From 4cbeda81d944beba86f82bc44097744bd30a9536 Mon Sep 17 00:00:00 2001 From: Wyon Bi Date: Tue, 20 Nov 2018 15:27:18 +0800 Subject: [PATCH] arm64: dts: rockchip: Add support for PX30 AD-R35-MB board Change-Id: Id3a800d8dcea0e9f93bf0f82b8892861a8b8a87f Signed-off-by: Wyon Bi --- arch/arm64/boot/dts/rockchip/Makefile | 4 + .../px30-ad-r35-mb-rk618-dual-lvds.dts | 974 +++++++++++++++ .../px30-ad-r35-mb-rk618-hdmi-lvds.dts | 1064 +++++++++++++++++ .../rockchip/px30-ad-r35-mb-rk618-hdmi.dts | 931 +++++++++++++++ .../rockchip/px30-ad-r35-mb-rk618-lvds.dts | 973 +++++++++++++++ 5 files changed, 3946 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-dual-lvds.dts create mode 100644 arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-hdmi-lvds.dts create mode 100644 arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-hdmi.dts create mode 100644 arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-lvds.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index 055800917f0f..8675249ba257 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -1,3 +1,7 @@ +dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-ad-r35-mb-rk618-dual-lvds.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-ad-r35-mb-rk618-hdmi.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-ad-r35-mb-rk618-hdmi-lvds.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-ad-r35-mb-rk618-lvds.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10-linux.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-lvds-v10.dtb diff --git a/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-dual-lvds.dts b/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-dual-lvds.dts new file mode 100644 index 000000000000..a870bfc59ef7 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-dual-lvds.dts @@ -0,0 +1,974 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd + */ + +/dts-v1/; +#include +#include +#include +#include +#include +#include +#include +#include "px30.dtsi" +#include "px30-android.dtsi" + +/ { + model = "Rockchip PX30 AD R35 MB board"; + compatible = "rockchip,px30-ad-r35-mb", "rockchip,px30"; + + adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 2>; + io-channel-names = "buttons"; + poll-interval = <100>; + keyup-threshold-microvolt = <1800000>; + + esc-key { + linux,code = ; + label = "esc"; + press-threshold-microvolt = <1270000>; + }; + + home-key { + linux,code = ; + label = "home"; + press-threshold-microvolt = <602000>; + }; + + menu-key { + linux,code = ; + label = "menu"; + press-threshold-microvolt = <952000>; + }; + + vol-down-key { + linux,code = ; + label = "volume down"; + press-threshold-microvolt = <290000>; + }; + + vol-up-key { + linux,code = ; + label = "volume up"; + press-threshold-microvolt = <17000>; + }; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm1 0 25000 0>; + brightness-levels = < + 0 1 2 3 4 5 6 7 + 8 9 10 11 12 13 14 15 + 16 17 18 19 20 21 22 23 + 24 25 26 27 28 29 30 31 + 32 33 34 35 36 37 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255>; + default-brightness-level = <200>; + enable-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; + }; + + panel { + compatible = "lg,lm215wf3", "simple-panel"; + backlight = <&backlight>; + power-supply = <&vcc3v3_lcd>; + enable-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_LOW>; + prepare-delay-ms = <120>; + enable-delay-ms = <120>; + disable-delay-ms = <120>; + unprepare-delay-ms = <120>; + bus-format = ; /* vesa-24 */ + width-mm = <476>; + height-mm = <268>; + + display-timings { + native-mode = <&timing1>; + + timing1: timing1 { + clock-frequency = <144000000>; + hactive = <1920>; + vactive = <1080>; + hback-porch = <96>; + hfront-porch = <96>; + vback-porch = <8>; + vfront-porch = <8>; + hsync-len = <64>; + vsync-len = <4>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + }; + + port { + panel_input_lvds: endpoint { + remote-endpoint = <&lvds_output_panel>; + }; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + + /* + * On the module itself this is one of these (depending + * on the actual card populated): + * - SDIO_RESET_L_WL_REG_ON + * - PDN (power down when low) + */ + reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; + }; + + vcc_phy: vcc-phy-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_phy"; + regulator-always-on; + regulator-boot-on; + }; + + vcc5v0_sys: vccsys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; +}; + +&cpu0 { + cpu-supply = <&vdd_arm>; +}; + +&display_subsystem { + status = "okay"; +}; + +&dfi { + status = "okay"; +}; + +&dmc { + center-supply = <&vdd_logic>; + status = "okay"; +}; + +&emmc { + bus-width = <8>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + supports-emmc; + disable-wp; + non-removable; + num-slots = <1>; + status = "okay"; +}; + +&gpu { + mali-supply = <&vdd_logic>; + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + rk809: pmic@20 { + compatible = "rockchip,rk809"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = <7 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int>; + rockchip,system-power-controller; + wakeup-source; + #clock-cells = <1>; + clock-output-names = "rk808-clkout1", "rk808-clkout2"; + + vcc1-supply = <&vcc5v0_sys>; + vcc2-supply = <&vcc5v0_sys>; + vcc3-supply = <&vcc5v0_sys>; + vcc4-supply = <&vcc5v0_sys>; + vcc5-supply = <&vcc3v3_sys>; + vcc6-supply = <&vcc3v3_sys>; + vcc7-supply = <&vcc3v3_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc5v0_sys>; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x1>; + regulator-name = "vdd_logic"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <950000>; + }; + }; + + vdd_arm: DCDC_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x1>; + regulator-name = "vdd_arm"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <950000>; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_ddr"; + regulator-initial-mode = <0x1>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_3v0: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-initial-mode = <0x1>; + regulator-name = "vcc_3v0"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <3000000>; + }; + }; + + vcc_1v0: LDO_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vcc_1v0"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc1v8_soc: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc1v8_soc"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd1v0_soc: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vcc1v0_soc"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc3v0_pmu: LDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v0_pmu"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + + }; + }; + + vccio_sd: LDO_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_sd: LDO_REG6 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_sd"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + + }; + }; + + vcc2v8_dvp: LDO_REG7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-name = "vcc2v8_dvp"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <2800000>; + }; + }; + + vcc1v8_dvp: LDO_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc1v8_dvp"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd1v5_dvp: LDO_REG9 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vdd1v5_dvp"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <1500000>; + }; + }; + + vcc3v3_sys: DCDC_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3_sys"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc3v3_lcd: SWITCH_REG1 { + regulator-boot-on; + regulator-name = "vcc3v3_lcd"; + }; + + vcc5v0_host: SWITCH_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc5v0_host"; + }; + }; + }; + + rk618@50 { + compatible = "rockchip,rk618"; + reg = <0x50>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s1_2ch_mclk>; + clocks = <&cru SCLK_I2S1_OUT>; + clock-names = "clkin"; + assigned-clocks = <&cru SCLK_I2S1_OUT>; + assigned-clock-rates = <12000000>; + reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; + status = "okay"; + + CRU: cru { + compatible = "rockchip,rk618-cru"; + clocks = <&cru SCLK_I2S1_OUT>, <&cru DCLK_VOPL>; + clock-names = "clkin", "lcdc0_dclkp"; + assigned-clocks = <&CRU SCALER_PLLIN_CLK>, <&CRU VIF_PLLIN_CLK>, + <&CRU SCALER_CLK>, <&CRU VIF0_PRE_CLK>, + <&CRU CODEC_CLK>, <&CRU DITHER_CLK>; + assigned-clock-parents = <&cru SCLK_I2S1_OUT>, <&CRU LCDC0_CLK>, + <&CRU SCALER_PLL_CLK>, <&CRU VIF_PLL_CLK>, + <&cru SCLK_I2S1_OUT>, <&CRU VIF0_CLK>; + #clock-cells = <1>; + status = "okay"; + }; + + lvds { + compatible = "rockchip,rk618-lvds"; + clocks = <&CRU LVDS_CLK>; + clock-names = "lvds"; + dual-channel; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + bridge_input_rgb: endpoint { + remote-endpoint = <&rgb_out_bridge>; + }; + }; + + port@1 { + reg = <1>; + + lvds_output_panel: endpoint { + remote-endpoint = <&panel_input_lvds>; + }; + }; + }; + }; + }; +}; + +&io_domains { + vccio1-supply = <&vcc1v8_soc>; + vccio2-supply = <&vccio_sd>; + vccio3-supply = <&vcc_3v0>; + vccio4-supply = <&vcc3v0_pmu>; + vccio5-supply = <&vcc_3v0>; + status = "okay"; +}; + +&nandc0 { + status = "okay"; +}; + +&pmu_io_domains { + pmuio1-supply = <&vcc3v0_pmu>; + pmuio2-supply = <&vcc3v0_pmu>; + status = "okay"; +}; + +&pwm1 { + status = "okay"; +}; + +&saradc { + vref-supply = <&vcc1v8_soc>; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + supports-sd; + card-detect-delay = <800>; + ignore-pm-notify; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + sd-uhs-sdr104; + vqmmc-supply = <&vccio_sd>; + vmmc-supply = <&vcc_sd>; + status = "okay"; +}; + +&sdio { + bus-width = <4>; + cap-sd-highspeed; + supports-sdio; + ignore-pm-notify; + keep-power-in-suspend; + non-removable; + mmc-pwrseq = <&sdio_pwrseq>; + sd-uhs-sdr104; + status = "okay"; +}; + +&tsadc { + pinctrl-names = "init", "default"; + pinctrl-0 = <&tsadc_otp_gpio>; + pinctrl-1 = <&tsadc_otp_out>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_xfer &uart1_cts>; + status = "okay"; +}; + +&u2phy { + status = "okay"; + + u2phy_host: host-port { + status = "okay"; + }; + + u2phy_otg: otg-port { + status = "okay"; + }; +}; + +&usb20_otg { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&vopb { + status = "okay"; +}; + +&vopb_mmu { + status = "okay"; +}; + +&vopl { + status = "okay"; +}; + +&vopl_mmu { + status = "okay"; +}; + +&vpu_combo { + status = "okay"; +}; + +&dsi { + status = "okay"; + + panel@0 { + compatible = "pvo,p101nwwbp-01g", "simple-panel-dsi"; + reg = <0>; + power-supply = <&vcc3v3_lcd>; + backlight = <&backlight>; + prepare-delay-ms = <20>; + reset-delay-ms = <20>; + init-delay-ms = <20>; + enable-delay-ms = <20>; + disable-delay-ms = <20>; + unprepare-delay-ms = <20>; + + width-mm = <135>; + height-mm = <216>; + + dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; + dsi,format = ; + dsi,lanes = <4>; + + panel-init-sequence = [ + 15 00 02 E0 00 + 15 00 02 E1 93 + 15 00 02 E2 65 + 15 00 02 E3 F8 + 15 00 02 80 03 + 15 00 02 E0 04 + 15 00 02 2B 2B + 15 00 02 2D 03 + 15 00 02 2E 44 + 15 00 02 E0 01 + 15 00 02 00 00 + 15 00 02 01 6D + 15 00 02 0C 74 + 15 00 02 17 00 + 15 00 02 18 A7 + 15 00 02 19 01 + 15 00 02 1A 00 + 15 00 02 1B A7 + 15 00 02 1C 01 + 15 00 02 1F 6A + 15 00 02 20 23 + 15 00 02 21 23 + 15 00 02 22 0E + 15 00 02 35 28 + 15 00 02 37 59 + 15 00 02 38 05 + 15 00 02 39 04 + 15 00 02 3A 08 + 15 00 02 3B 08 + 15 00 02 3C 7C + 15 00 02 3D FF + 15 00 02 3E FF + 15 00 02 3F FF + 15 00 02 40 06 + 15 00 02 41 A0 + 15 00 02 43 08 + 15 00 02 44 0B + 15 00 02 45 88 + 15 00 02 4B 04 + 15 00 02 55 01 + 15 00 02 56 01 + 15 00 02 57 8D + 15 00 02 58 0A + 15 00 02 59 0A + 15 00 02 5A 28 + 15 00 02 5B 1E + 15 00 02 5C 16 + 15 00 02 5D 76 + 15 00 02 5E 58 + 15 00 02 5F 46 + 15 00 02 60 39 + 15 00 02 61 37 + 15 00 02 62 2A + 15 00 02 63 2F + 15 00 02 64 18 + 15 00 02 65 39 + 15 00 02 66 38 + 15 00 02 67 3A + 15 00 02 68 5A + 15 00 02 69 46 + 15 00 02 6A 4C + 15 00 02 6B 3F + 15 00 02 6C 3D + 15 00 02 6D 2F + 15 00 02 6E 1E + 15 00 02 6F 00 + 15 00 02 70 76 + 15 00 02 71 58 + 15 00 02 72 46 + 15 00 02 73 39 + 15 00 02 74 33 + 15 00 02 75 22 + 15 00 02 76 27 + 15 00 02 77 14 + 15 00 02 78 29 + 15 00 02 79 2A + 15 00 02 7A 28 + 15 00 02 7B 46 + 15 00 02 7C 38 + 15 00 02 7D 3E + 15 00 02 7E 31 + 15 00 02 7F 29 + 15 00 02 80 1B + 15 00 02 81 0A + 15 00 02 82 00 + 15 00 02 E0 02 + 15 00 02 00 44 + 15 00 02 01 44 + 15 00 02 02 45 + 15 00 02 03 45 + 15 00 02 04 46 + 15 00 02 05 46 + 15 00 02 06 47 + 15 00 02 07 47 + 15 00 02 08 1D + 15 00 02 09 1D + 15 00 02 0A 1D + 15 00 02 0B 1D + 15 00 02 0C 1D + 15 00 02 0D 1D + 15 00 02 0E 1D + 15 00 02 0F 57 + 15 00 02 10 57 + 15 00 02 11 58 + 15 00 02 12 58 + 15 00 02 13 40 + 15 00 02 14 55 + 15 00 02 15 55 + 15 00 02 16 44 + 15 00 02 17 44 + 15 00 02 18 45 + 15 00 02 19 45 + 15 00 02 1A 46 + 15 00 02 1B 46 + 15 00 02 1C 47 + 15 00 02 1D 47 + 15 00 02 1E 1D + 15 00 02 1F 1D + 15 00 02 20 1D + 15 00 02 21 1D + 15 00 02 22 1D + 15 00 02 23 1D + 15 00 02 24 1D + 15 00 02 25 57 + 15 00 02 26 57 + 15 00 02 27 58 + 15 00 02 28 58 + 15 00 02 29 40 + 15 00 02 2A 55 + 15 00 02 2B 55 + 15 00 02 58 40 + 15 00 02 59 00 + 15 00 02 5A 00 + 15 00 02 5B 00 + 15 00 02 5C 0A + 15 00 02 5D 10 + 15 00 02 5E 01 + 15 00 02 5F 02 + 15 00 02 60 00 + 15 00 02 61 01 + 15 00 02 62 02 + 15 00 02 63 0B + 15 00 02 64 6A + 15 00 02 65 00 + 15 00 02 66 00 + 15 00 02 67 31 + 15 00 02 68 0B + 15 00 02 69 1E + 15 00 02 6A 6A + 15 00 02 6B 04 + 15 00 02 6C 00 + 15 00 02 6D 04 + 15 00 02 6E 00 + 15 00 02 6F 88 + 15 00 02 70 00 + 15 00 02 71 00 + 15 00 02 72 06 + 15 00 02 73 7B + 15 00 02 74 00 + 15 00 02 75 F8 + 15 00 02 76 00 + 15 00 02 77 0D + 15 00 02 78 14 + 15 00 02 79 00 + 15 00 02 7A 00 + 15 00 02 7B 00 + 15 00 02 7C 00 + 15 00 02 7D 03 + 15 00 02 7E 7B + 15 00 02 E0 00 + 15 00 02 E6 02 + 15 00 02 E7 06 + 15 80 01 11 + 15 16 01 29 + ]; + + panel-exit-sequence = [ + 05 00 01 28 + 05 00 01 10 + ]; + + display-timings { + native-mode = <&timing0>; + + timing0: timing0 { + clock-frequency = <68500000>; + hactive = <800>; + hfront-porch = <16>; + hsync-len = <16>; + hback-porch = <48>; + vactive = <1280>; + vfront-porch = <8>; + vsync-len = <4>; + vback-porch = <4>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + }; + }; +}; + +&mipi_dphy { + status = "okay"; +}; + +&dsi_in_vopl { + status = "disabled"; +}; + +&dsi_in_vopb { + status = "okay"; +}; + +&route_dsi { + connect = <&vopb_out_dsi>; + status = "okay"; +}; + +&rgb { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&lcdc_rgb_pins>; + pinctrl-1 = <&lcdc_sleep_pins>; + status = "okay"; + + ports { + port@1 { + reg = <1>; + + rgb_out_bridge: endpoint { + remote-endpoint = <&bridge_input_rgb>; + }; + }; + }; +}; + +&rgb_in_vopb { + status = "disabled"; +}; + +&rgb_in_vopl { + status = "okay"; +}; + +&route_rgb { + connect = <&vopl_out_rgb>; + status = "disabled"; +}; + +&pinctrl { + lcdc { + lcdc_rgb_pins: lcdc-rgb-pins { + rockchip,pins = + <3 RK_PA0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_DCLK */ + <3 RK_PA1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_HSYNC */ + <3 RK_PA2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_VSYNC */ + <3 RK_PA3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_DEN */ + <3 RK_PD3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D23 */ + <3 RK_PD2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D22 */ + <3 RK_PD1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D21 */ + <3 RK_PD0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D20 */ + <3 RK_PC7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D19 */ + <3 RK_PC6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D18 */ + <3 RK_PC5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D17 */ + <3 RK_PC4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D16 */ + <3 RK_PC3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D15 */ + <3 RK_PC2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D14 */ + <3 RK_PC1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D13 */ + <3 RK_PC0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D12 */ + <3 RK_PB7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D11 */ + <3 RK_PB6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D10 */ + <3 RK_PB5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D9 */ + <3 RK_PB4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D8 */ + <3 RK_PB3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D7 */ + <3 RK_PB2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D6 */ + <3 RK_PB1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D5 */ + <3 RK_PB0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D4 */ + <3 RK_PA7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D3 */ + <3 RK_PA6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D2 */ + <3 RK_PA5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D1 */ + <3 RK_PA4 RK_FUNC_1 &pcfg_pull_none_8ma>; /* LCDC_D0 */ + }; + + lcdc_sleep_pins: lcdc-sleep-pins { + rockchip,pins = + <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DCLK */ + <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_HSYNC */ + <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_VSYNC */ + <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DEN */ + <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D23 */ + <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D22 */ + <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D21 */ + <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D20 */ + <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D19 */ + <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D18 */ + <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D17 */ + <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D16 */ + <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D15 */ + <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D14 */ + <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D13 */ + <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D12 */ + <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D11 */ + <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D10 */ + <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D9 */ + <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D8 */ + <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D7 */ + <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D6 */ + <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D5 */ + <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D4 */ + <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D3 */ + <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D2 */ + <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D1 */ + <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; /* LCDC_D0 */ + }; + }; + + pmic { + pmic_int: pmic_int { + rockchip,pins = + <0 7 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&firmware_android { + compatible = "android,firmware"; + + fstab { + compatible = "android,fstab"; + + system { + compatible = "android,system"; + dev = "/dev/block/by-name/system"; + type = "ext4"; + mnt_flags = "ro,barrier=1,inode_readahead_blks=8"; + fsmgr_flags = "wait"; + }; + + vendor { + compatible = "android,vendor"; + dev = "/dev/block/by-name/vendor"; + type = "ext4"; + mnt_flags = "ro,barrier=1,inode_readahead_blks=8"; + fsmgr_flags = "wait"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-hdmi-lvds.dts b/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-hdmi-lvds.dts new file mode 100644 index 000000000000..e9c8205cc2fe --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-hdmi-lvds.dts @@ -0,0 +1,1064 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd + */ + +/dts-v1/; +#include +#include +#include +#include +#include +#include +#include +#include "px30.dtsi" +#include "px30-android.dtsi" + +/ { + model = "Rockchip PX30 AD R35 MB board"; + compatible = "rockchip,px30-ad-r35-mb", "rockchip,px30"; + + adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 2>; + io-channel-names = "buttons"; + poll-interval = <100>; + keyup-threshold-microvolt = <1800000>; + + esc-key { + linux,code = ; + label = "esc"; + press-threshold-microvolt = <1270000>; + }; + + home-key { + linux,code = ; + label = "home"; + press-threshold-microvolt = <602000>; + }; + + menu-key { + linux,code = ; + label = "menu"; + press-threshold-microvolt = <952000>; + }; + + vol-down-key { + linux,code = ; + label = "volume down"; + press-threshold-microvolt = <290000>; + }; + + vol-up-key { + linux,code = ; + label = "volume up"; + press-threshold-microvolt = <17000>; + }; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm1 0 25000 0>; + brightness-levels = < + 0 1 2 3 4 5 6 7 + 8 9 10 11 12 13 14 15 + 16 17 18 19 20 21 22 23 + 24 25 26 27 28 29 30 31 + 32 33 34 35 36 37 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255>; + default-brightness-level = <200>; + enable-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; + }; + + panel { + compatible = "simple-panel"; + backlight = <&backlight>; + power-supply = <&vcc3v3_lcd>; + enable-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_LOW>; + prepare-delay-ms = <120>; + enable-delay-ms = <120>; + disable-delay-ms = <120>; + unprepare-delay-ms = <120>; + bus-format = ; /* vesa-24 */ + width-mm = <231>; + height-mm = <154>; + + display-timings { + native-mode = <&timing1>; + + timing1: timing1 { + clock-frequency = <72000000>; + hactive = <1280>; + vactive = <800>; + hback-porch = <60>; + hfront-porch = <60>; + vback-porch = <16>; + vfront-porch = <16>; + hsync-len = <40>; + vsync-len = <6>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + }; + + port { + panel_input_lvds: endpoint { + remote-endpoint = <&lvds_output_panel>; + }; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + + /* + * On the module itself this is one of these (depending + * on the actual card populated): + * - SDIO_RESET_L_WL_REG_ON + * - PDN (power down when low) + */ + reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; + }; + + vcc_phy: vcc-phy-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_phy"; + regulator-always-on; + regulator-boot-on; + }; + + vcc5v0_sys: vccsys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; +}; + +&cpu0 { + cpu-supply = <&vdd_arm>; +}; + +&display_subsystem { + status = "okay"; +}; + +&dfi { + status = "okay"; +}; + +&dmc { + center-supply = <&vdd_logic>; + status = "okay"; +}; + +&emmc { + bus-width = <8>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + supports-emmc; + disable-wp; + non-removable; + num-slots = <1>; + status = "okay"; +}; + +&gpu { + mali-supply = <&vdd_logic>; + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + rk809: pmic@20 { + compatible = "rockchip,rk809"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = <7 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int>; + rockchip,system-power-controller; + wakeup-source; + #clock-cells = <1>; + clock-output-names = "rk808-clkout1", "rk808-clkout2"; + + vcc1-supply = <&vcc5v0_sys>; + vcc2-supply = <&vcc5v0_sys>; + vcc3-supply = <&vcc5v0_sys>; + vcc4-supply = <&vcc5v0_sys>; + vcc5-supply = <&vcc3v3_sys>; + vcc6-supply = <&vcc3v3_sys>; + vcc7-supply = <&vcc3v3_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc5v0_sys>; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x1>; + regulator-name = "vdd_logic"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <950000>; + }; + }; + + vdd_arm: DCDC_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x1>; + regulator-name = "vdd_arm"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <950000>; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_ddr"; + regulator-initial-mode = <0x1>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_3v0: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-initial-mode = <0x1>; + regulator-name = "vcc_3v0"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <3000000>; + }; + }; + + vcc_1v0: LDO_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vcc_1v0"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc1v8_soc: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc1v8_soc"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd1v0_soc: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vcc1v0_soc"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc3v0_pmu: LDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v0_pmu"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + + }; + }; + + vccio_sd: LDO_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_sd: LDO_REG6 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_sd"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + + }; + }; + + vcc2v8_dvp: LDO_REG7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-name = "vcc2v8_dvp"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <2800000>; + }; + }; + + vcc1v8_dvp: LDO_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc1v8_dvp"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd1v5_dvp: LDO_REG9 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vdd1v5_dvp"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <1500000>; + }; + }; + + vcc3v3_sys: DCDC_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3_sys"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc3v3_lcd: SWITCH_REG1 { + regulator-boot-on; + regulator-name = "vcc3v3_lcd"; + }; + + vcc5v0_host: SWITCH_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc5v0_host"; + }; + }; + }; + + rk618@50 { + compatible = "rockchip,rk618"; + reg = <0x50>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s1_2ch_mclk>; + clocks = <&cru SCLK_I2S1_OUT>; + clock-names = "clkin"; + assigned-clocks = <&cru SCLK_I2S1_OUT>; + assigned-clock-rates = <12000000>; + reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; + status = "okay"; + + CRU: cru { + compatible = "rockchip,rk618-cru"; + clocks = <&cru SCLK_I2S1_OUT>, <&cru DCLK_VOPL>; + clock-names = "clkin", "lcdc0_dclkp"; + assigned-clocks = <&CRU SCALER_PLLIN_CLK>, <&CRU VIF_PLLIN_CLK>, + <&CRU SCALER_CLK>, <&CRU VIF0_PRE_CLK>, + <&CRU CODEC_CLK>, <&CRU DITHER_CLK>; + assigned-clock-parents = <&cru SCLK_I2S1_OUT>, <&CRU LCDC0_CLK>, + <&CRU SCALER_PLL_CLK>, <&CRU VIF_PLL_CLK>, + <&cru SCLK_I2S1_OUT>, <&CRU VIF0_CLK>; + #clock-cells = <1>; + status = "okay"; + }; + + hdmi { + compatible = "rockchip,rk618-hdmi"; + clocks = <&CRU HDMI_CLK>; + clock-names = "hdmi"; + assigned-clocks = <&CRU HDMI_CLK>; + assigned-clock-parents = <&CRU VIF0_CLK>; + interrupt-parent = <&gpio2>; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH>; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + hdmi_input_vif: endpoint { + remote-endpoint = <&vif_output_hdmi>; + }; + }; + + port@1 { + reg = <1>; + + hdmi_output_scaler: endpoint { + remote-endpoint = <&scaler_input_hdmi>; + }; + }; + }; + }; + + lvds { + compatible = "rockchip,rk618-lvds"; + clocks = <&CRU LVDS_CLK>; + clock-names = "lvds"; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + lvds_input_scaler: endpoint { + remote-endpoint = <&scaler_output_lvds>; + }; + }; + + port@1 { + reg = <1>; + + lvds_output_panel: endpoint { + remote-endpoint = <&panel_input_lvds>; + }; + }; + }; + }; + + scaler { + compatible = "rockchip,rk618-scaler"; + clocks = <&CRU SCALER_CLK>, <&CRU VIF0_CLK>, + <&CRU DITHER_CLK>; + clock-names = "scaler", "vif", "dither"; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + scaler_input_hdmi: endpoint { + remote-endpoint = <&hdmi_output_scaler>; + }; + }; + + port@1 { + reg = <1>; + + scaler_output_lvds: endpoint { + remote-endpoint = <&lvds_input_scaler>; + }; + }; + }; + }; + + vif { + compatible = "rockchip,rk618-vif"; + clocks = <&CRU VIF0_CLK>, <&CRU VIF0_PRE_CLK>; + clock-names = "vif", "vif_pre"; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + bridge_input_rgb: endpoint { + remote-endpoint = <&rgb_out_bridge>; + }; + }; + + port@1 { + reg = <1>; + + vif_output_hdmi: endpoint { + remote-endpoint = <&hdmi_input_vif>; + }; + }; + }; + }; + }; +}; + +&io_domains { + vccio1-supply = <&vcc1v8_soc>; + vccio2-supply = <&vccio_sd>; + vccio3-supply = <&vcc_3v0>; + vccio4-supply = <&vcc3v0_pmu>; + vccio5-supply = <&vcc_3v0>; + status = "okay"; +}; + +&nandc0 { + status = "okay"; +}; + +&pmu_io_domains { + pmuio1-supply = <&vcc3v0_pmu>; + pmuio2-supply = <&vcc3v0_pmu>; + status = "okay"; +}; + +&pwm1 { + status = "okay"; +}; + +&saradc { + vref-supply = <&vcc1v8_soc>; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + supports-sd; + card-detect-delay = <800>; + ignore-pm-notify; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + sd-uhs-sdr104; + vqmmc-supply = <&vccio_sd>; + vmmc-supply = <&vcc_sd>; + status = "okay"; +}; + +&sdio { + bus-width = <4>; + cap-sd-highspeed; + supports-sdio; + ignore-pm-notify; + keep-power-in-suspend; + non-removable; + mmc-pwrseq = <&sdio_pwrseq>; + sd-uhs-sdr104; + status = "okay"; +}; + +&tsadc { + pinctrl-names = "init", "default"; + pinctrl-0 = <&tsadc_otp_gpio>; + pinctrl-1 = <&tsadc_otp_out>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_xfer &uart1_cts>; + status = "okay"; +}; + +&u2phy { + status = "okay"; + + u2phy_host: host-port { + status = "okay"; + }; + + u2phy_otg: otg-port { + status = "okay"; + }; +}; + +&usb20_otg { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&vopb { + status = "okay"; +}; + +&vopb_mmu { + status = "okay"; +}; + +&vopl { + assigned-clocks = <&cru PLL_NPLL>; + assigned-clock-rates = <1188000000>; + status = "okay"; +}; + +&vopl_mmu { + status = "okay"; +}; + +&vpu_combo { + status = "okay"; +}; + +&dsi { + status = "okay"; + + panel@0 { + compatible = "pvo,p101nwwbp-01g", "simple-panel-dsi"; + reg = <0>; + power-supply = <&vcc3v3_lcd>; + backlight = <&backlight>; + prepare-delay-ms = <20>; + reset-delay-ms = <20>; + init-delay-ms = <20>; + enable-delay-ms = <20>; + disable-delay-ms = <20>; + unprepare-delay-ms = <20>; + + width-mm = <135>; + height-mm = <216>; + + dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; + dsi,format = ; + dsi,lanes = <4>; + + panel-init-sequence = [ + 15 00 02 E0 00 + 15 00 02 E1 93 + 15 00 02 E2 65 + 15 00 02 E3 F8 + 15 00 02 80 03 + 15 00 02 E0 04 + 15 00 02 2B 2B + 15 00 02 2D 03 + 15 00 02 2E 44 + 15 00 02 E0 01 + 15 00 02 00 00 + 15 00 02 01 6D + 15 00 02 0C 74 + 15 00 02 17 00 + 15 00 02 18 A7 + 15 00 02 19 01 + 15 00 02 1A 00 + 15 00 02 1B A7 + 15 00 02 1C 01 + 15 00 02 1F 6A + 15 00 02 20 23 + 15 00 02 21 23 + 15 00 02 22 0E + 15 00 02 35 28 + 15 00 02 37 59 + 15 00 02 38 05 + 15 00 02 39 04 + 15 00 02 3A 08 + 15 00 02 3B 08 + 15 00 02 3C 7C + 15 00 02 3D FF + 15 00 02 3E FF + 15 00 02 3F FF + 15 00 02 40 06 + 15 00 02 41 A0 + 15 00 02 43 08 + 15 00 02 44 0B + 15 00 02 45 88 + 15 00 02 4B 04 + 15 00 02 55 01 + 15 00 02 56 01 + 15 00 02 57 8D + 15 00 02 58 0A + 15 00 02 59 0A + 15 00 02 5A 28 + 15 00 02 5B 1E + 15 00 02 5C 16 + 15 00 02 5D 76 + 15 00 02 5E 58 + 15 00 02 5F 46 + 15 00 02 60 39 + 15 00 02 61 37 + 15 00 02 62 2A + 15 00 02 63 2F + 15 00 02 64 18 + 15 00 02 65 39 + 15 00 02 66 38 + 15 00 02 67 3A + 15 00 02 68 5A + 15 00 02 69 46 + 15 00 02 6A 4C + 15 00 02 6B 3F + 15 00 02 6C 3D + 15 00 02 6D 2F + 15 00 02 6E 1E + 15 00 02 6F 00 + 15 00 02 70 76 + 15 00 02 71 58 + 15 00 02 72 46 + 15 00 02 73 39 + 15 00 02 74 33 + 15 00 02 75 22 + 15 00 02 76 27 + 15 00 02 77 14 + 15 00 02 78 29 + 15 00 02 79 2A + 15 00 02 7A 28 + 15 00 02 7B 46 + 15 00 02 7C 38 + 15 00 02 7D 3E + 15 00 02 7E 31 + 15 00 02 7F 29 + 15 00 02 80 1B + 15 00 02 81 0A + 15 00 02 82 00 + 15 00 02 E0 02 + 15 00 02 00 44 + 15 00 02 01 44 + 15 00 02 02 45 + 15 00 02 03 45 + 15 00 02 04 46 + 15 00 02 05 46 + 15 00 02 06 47 + 15 00 02 07 47 + 15 00 02 08 1D + 15 00 02 09 1D + 15 00 02 0A 1D + 15 00 02 0B 1D + 15 00 02 0C 1D + 15 00 02 0D 1D + 15 00 02 0E 1D + 15 00 02 0F 57 + 15 00 02 10 57 + 15 00 02 11 58 + 15 00 02 12 58 + 15 00 02 13 40 + 15 00 02 14 55 + 15 00 02 15 55 + 15 00 02 16 44 + 15 00 02 17 44 + 15 00 02 18 45 + 15 00 02 19 45 + 15 00 02 1A 46 + 15 00 02 1B 46 + 15 00 02 1C 47 + 15 00 02 1D 47 + 15 00 02 1E 1D + 15 00 02 1F 1D + 15 00 02 20 1D + 15 00 02 21 1D + 15 00 02 22 1D + 15 00 02 23 1D + 15 00 02 24 1D + 15 00 02 25 57 + 15 00 02 26 57 + 15 00 02 27 58 + 15 00 02 28 58 + 15 00 02 29 40 + 15 00 02 2A 55 + 15 00 02 2B 55 + 15 00 02 58 40 + 15 00 02 59 00 + 15 00 02 5A 00 + 15 00 02 5B 00 + 15 00 02 5C 0A + 15 00 02 5D 10 + 15 00 02 5E 01 + 15 00 02 5F 02 + 15 00 02 60 00 + 15 00 02 61 01 + 15 00 02 62 02 + 15 00 02 63 0B + 15 00 02 64 6A + 15 00 02 65 00 + 15 00 02 66 00 + 15 00 02 67 31 + 15 00 02 68 0B + 15 00 02 69 1E + 15 00 02 6A 6A + 15 00 02 6B 04 + 15 00 02 6C 00 + 15 00 02 6D 04 + 15 00 02 6E 00 + 15 00 02 6F 88 + 15 00 02 70 00 + 15 00 02 71 00 + 15 00 02 72 06 + 15 00 02 73 7B + 15 00 02 74 00 + 15 00 02 75 F8 + 15 00 02 76 00 + 15 00 02 77 0D + 15 00 02 78 14 + 15 00 02 79 00 + 15 00 02 7A 00 + 15 00 02 7B 00 + 15 00 02 7C 00 + 15 00 02 7D 03 + 15 00 02 7E 7B + 15 00 02 E0 00 + 15 00 02 E6 02 + 15 00 02 E7 06 + 15 80 01 11 + 15 16 01 29 + ]; + + panel-exit-sequence = [ + 05 00 01 28 + 05 00 01 10 + ]; + + display-timings { + native-mode = <&timing0>; + + timing0: timing0 { + clock-frequency = <68500000>; + hactive = <800>; + hfront-porch = <16>; + hsync-len = <16>; + hback-porch = <48>; + vactive = <1280>; + vfront-porch = <8>; + vsync-len = <4>; + vback-porch = <4>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + }; + }; +}; + +&mipi_dphy { + status = "okay"; +}; + +&dsi_in_vopl { + status = "disabled"; +}; + +&dsi_in_vopb { + status = "okay"; +}; + +&route_dsi { + connect = <&vopb_out_dsi>; + status = "okay"; +}; + +&rgb { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&lcdc_rgb_pins>; + pinctrl-1 = <&lcdc_sleep_pins>; + status = "okay"; + + ports { + port@1 { + reg = <1>; + + rgb_out_bridge: endpoint { + remote-endpoint = <&bridge_input_rgb>; + }; + }; + }; +}; + +&rgb_in_vopb { + status = "disabled"; +}; + +&rgb_in_vopl { + status = "okay"; +}; + +&route_rgb { + connect = <&vopl_out_rgb>; + status = "disabled"; +}; + +&pinctrl { + lcdc { + lcdc_rgb_pins: lcdc-rgb-pins { + rockchip,pins = + <3 RK_PA0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_DCLK */ + <3 RK_PA1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_HSYNC */ + <3 RK_PA2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_VSYNC */ + <3 RK_PA3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_DEN */ + <3 RK_PD3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D23 */ + <3 RK_PD2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D22 */ + <3 RK_PD1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D21 */ + <3 RK_PD0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D20 */ + <3 RK_PC7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D19 */ + <3 RK_PC6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D18 */ + <3 RK_PC5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D17 */ + <3 RK_PC4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D16 */ + <3 RK_PC3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D15 */ + <3 RK_PC2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D14 */ + <3 RK_PC1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D13 */ + <3 RK_PC0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D12 */ + <3 RK_PB7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D11 */ + <3 RK_PB6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D10 */ + <3 RK_PB5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D9 */ + <3 RK_PB4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D8 */ + <3 RK_PB3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D7 */ + <3 RK_PB2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D6 */ + <3 RK_PB1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D5 */ + <3 RK_PB0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D4 */ + <3 RK_PA7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D3 */ + <3 RK_PA6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D2 */ + <3 RK_PA5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D1 */ + <3 RK_PA4 RK_FUNC_1 &pcfg_pull_none_8ma>; /* LCDC_D0 */ + }; + + lcdc_sleep_pins: lcdc-sleep-pins { + rockchip,pins = + <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DCLK */ + <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_HSYNC */ + <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_VSYNC */ + <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DEN */ + <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D23 */ + <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D22 */ + <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D21 */ + <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D20 */ + <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D19 */ + <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D18 */ + <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D17 */ + <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D16 */ + <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D15 */ + <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D14 */ + <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D13 */ + <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D12 */ + <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D11 */ + <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D10 */ + <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D9 */ + <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D8 */ + <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D7 */ + <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D6 */ + <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D5 */ + <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D4 */ + <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D3 */ + <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D2 */ + <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D1 */ + <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; /* LCDC_D0 */ + }; + }; + + pmic { + pmic_int: pmic_int { + rockchip,pins = + <0 7 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&firmware_android { + compatible = "android,firmware"; + + fstab { + compatible = "android,fstab"; + + system { + compatible = "android,system"; + dev = "/dev/block/by-name/system"; + type = "ext4"; + mnt_flags = "ro,barrier=1,inode_readahead_blks=8"; + fsmgr_flags = "wait"; + }; + + vendor { + compatible = "android,vendor"; + dev = "/dev/block/by-name/vendor"; + type = "ext4"; + mnt_flags = "ro,barrier=1,inode_readahead_blks=8"; + fsmgr_flags = "wait"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-hdmi.dts b/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-hdmi.dts new file mode 100644 index 000000000000..1333012f0642 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-hdmi.dts @@ -0,0 +1,931 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd + */ + +/dts-v1/; +#include +#include +#include +#include +#include +#include +#include +#include "px30.dtsi" +#include "px30-android.dtsi" + +/ { + model = "Rockchip PX30 AD R35 MB board"; + compatible = "rockchip,px30-ad-r35-mb", "rockchip,px30"; + + adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 2>; + io-channel-names = "buttons"; + poll-interval = <100>; + keyup-threshold-microvolt = <1800000>; + + esc-key { + linux,code = ; + label = "esc"; + press-threshold-microvolt = <1270000>; + }; + + home-key { + linux,code = ; + label = "home"; + press-threshold-microvolt = <602000>; + }; + + menu-key { + linux,code = ; + label = "menu"; + press-threshold-microvolt = <952000>; + }; + + vol-down-key { + linux,code = ; + label = "volume down"; + press-threshold-microvolt = <290000>; + }; + + vol-up-key { + linux,code = ; + label = "volume up"; + press-threshold-microvolt = <17000>; + }; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm1 0 25000 0>; + brightness-levels = < + 0 1 2 3 4 5 6 7 + 8 9 10 11 12 13 14 15 + 16 17 18 19 20 21 22 23 + 24 25 26 27 28 29 30 31 + 32 33 34 35 36 37 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255>; + default-brightness-level = <200>; + enable-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + + /* + * On the module itself this is one of these (depending + * on the actual card populated): + * - SDIO_RESET_L_WL_REG_ON + * - PDN (power down when low) + */ + reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; + }; + + vcc_phy: vcc-phy-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_phy"; + regulator-always-on; + regulator-boot-on; + }; + + vcc5v0_sys: vccsys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; +}; + +&cpu0 { + cpu-supply = <&vdd_arm>; +}; + +&display_subsystem { + status = "okay"; +}; + +&dfi { + status = "okay"; +}; + +&dmc { + center-supply = <&vdd_logic>; + status = "okay"; +}; + +&emmc { + bus-width = <8>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + supports-emmc; + disable-wp; + non-removable; + num-slots = <1>; + status = "okay"; +}; + +&gpu { + mali-supply = <&vdd_logic>; + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + rk809: pmic@20 { + compatible = "rockchip,rk809"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = <7 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int>; + rockchip,system-power-controller; + wakeup-source; + #clock-cells = <1>; + clock-output-names = "rk808-clkout1", "rk808-clkout2"; + + vcc1-supply = <&vcc5v0_sys>; + vcc2-supply = <&vcc5v0_sys>; + vcc3-supply = <&vcc5v0_sys>; + vcc4-supply = <&vcc5v0_sys>; + vcc5-supply = <&vcc3v3_sys>; + vcc6-supply = <&vcc3v3_sys>; + vcc7-supply = <&vcc3v3_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc5v0_sys>; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x1>; + regulator-name = "vdd_logic"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <950000>; + }; + }; + + vdd_arm: DCDC_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x1>; + regulator-name = "vdd_arm"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <950000>; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_ddr"; + regulator-initial-mode = <0x1>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_3v0: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-initial-mode = <0x1>; + regulator-name = "vcc_3v0"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <3000000>; + }; + }; + + vcc_1v0: LDO_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vcc_1v0"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc1v8_soc: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc1v8_soc"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd1v0_soc: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vcc1v0_soc"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc3v0_pmu: LDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v0_pmu"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + + }; + }; + + vccio_sd: LDO_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_sd: LDO_REG6 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_sd"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + + }; + }; + + vcc2v8_dvp: LDO_REG7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-name = "vcc2v8_dvp"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <2800000>; + }; + }; + + vcc1v8_dvp: LDO_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc1v8_dvp"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd1v5_dvp: LDO_REG9 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vdd1v5_dvp"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <1500000>; + }; + }; + + vcc3v3_sys: DCDC_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3_sys"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc3v3_lcd: SWITCH_REG1 { + regulator-boot-on; + regulator-name = "vcc3v3_lcd"; + }; + + vcc5v0_host: SWITCH_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc5v0_host"; + }; + }; + }; + + rk618@50 { + compatible = "rockchip,rk618"; + reg = <0x50>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s1_2ch_mclk>; + clocks = <&cru SCLK_I2S1_OUT>; + clock-names = "clkin"; + assigned-clocks = <&cru SCLK_I2S1_OUT>; + assigned-clock-rates = <12000000>; + reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; + status = "okay"; + + CRU: cru { + compatible = "rockchip,rk618-cru"; + clocks = <&cru SCLK_I2S1_OUT>, <&cru DCLK_VOPL>; + clock-names = "clkin", "lcdc0_dclkp"; + assigned-clocks = <&CRU SCALER_PLLIN_CLK>, <&CRU VIF_PLLIN_CLK>, + <&CRU SCALER_CLK>, <&CRU VIF0_PRE_CLK>, + <&CRU CODEC_CLK>, <&CRU DITHER_CLK>; + assigned-clock-parents = <&cru SCLK_I2S1_OUT>, <&CRU LCDC0_CLK>, + <&CRU SCALER_PLL_CLK>, <&CRU VIF_PLL_CLK>, + <&cru SCLK_I2S1_OUT>, <&CRU VIF0_CLK>; + #clock-cells = <1>; + status = "okay"; + }; + + hdmi { + compatible = "rockchip,rk618-hdmi"; + clocks = <&CRU HDMI_CLK>; + clock-names = "hdmi"; + assigned-clocks = <&CRU HDMI_CLK>; + assigned-clock-parents = <&CRU VIF0_CLK>; + interrupt-parent = <&gpio2>; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH>; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + bridge_input_rgb: endpoint { + remote-endpoint = <&rgb_out_bridge>; + }; + }; + }; + }; + }; +}; + +&io_domains { + vccio1-supply = <&vcc1v8_soc>; + vccio2-supply = <&vccio_sd>; + vccio3-supply = <&vcc_3v0>; + vccio4-supply = <&vcc3v0_pmu>; + vccio5-supply = <&vcc_3v0>; + status = "okay"; +}; + +&nandc0 { + status = "okay"; +}; + +&pmu_io_domains { + pmuio1-supply = <&vcc3v0_pmu>; + pmuio2-supply = <&vcc3v0_pmu>; + status = "okay"; +}; + +&pwm1 { + status = "okay"; +}; + +&saradc { + status = "okay"; + vref-supply = <&vcc1v8_soc>; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + supports-sd; + card-detect-delay = <800>; + ignore-pm-notify; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + sd-uhs-sdr104; + vqmmc-supply = <&vccio_sd>; + vmmc-supply = <&vcc_sd>; + status = "okay"; +}; + +&sdio { + bus-width = <4>; + cap-sd-highspeed; + supports-sdio; + ignore-pm-notify; + keep-power-in-suspend; + non-removable; + mmc-pwrseq = <&sdio_pwrseq>; + sd-uhs-sdr104; + status = "okay"; +}; + +&tsadc { + pinctrl-names = "init", "default"; + pinctrl-0 = <&tsadc_otp_gpio>; + pinctrl-1 = <&tsadc_otp_out>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_xfer &uart1_cts>; + status = "okay"; +}; + +&u2phy { + status = "okay"; + + u2phy_host: host-port { + status = "okay"; + }; + + u2phy_otg: otg-port { + status = "okay"; + }; +}; + +&usb20_otg { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&vopb { + status = "okay"; +}; + +&vopb_mmu { + status = "okay"; +}; + +&vopl { + assigned-clocks = <&cru PLL_NPLL>; + assigned-clock-rates = <1188000000>; + status = "okay"; +}; + +&vopl_mmu { + status = "okay"; +}; + +&vpu_combo { + status = "okay"; +}; + +&dsi { + status = "okay"; + + panel@0 { + compatible = "pvo,p101nwwbp-01g", "simple-panel-dsi"; + reg = <0>; + power-supply = <&vcc3v3_lcd>; + backlight = <&backlight>; + prepare-delay-ms = <20>; + reset-delay-ms = <20>; + init-delay-ms = <20>; + enable-delay-ms = <20>; + disable-delay-ms = <20>; + unprepare-delay-ms = <20>; + + width-mm = <135>; + height-mm = <216>; + + dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; + dsi,format = ; + dsi,lanes = <4>; + + panel-init-sequence = [ + 15 00 02 E0 00 + 15 00 02 E1 93 + 15 00 02 E2 65 + 15 00 02 E3 F8 + 15 00 02 80 03 + 15 00 02 E0 04 + 15 00 02 2B 2B + 15 00 02 2D 03 + 15 00 02 2E 44 + 15 00 02 E0 01 + 15 00 02 00 00 + 15 00 02 01 6D + 15 00 02 0C 74 + 15 00 02 17 00 + 15 00 02 18 A7 + 15 00 02 19 01 + 15 00 02 1A 00 + 15 00 02 1B A7 + 15 00 02 1C 01 + 15 00 02 1F 6A + 15 00 02 20 23 + 15 00 02 21 23 + 15 00 02 22 0E + 15 00 02 35 28 + 15 00 02 37 59 + 15 00 02 38 05 + 15 00 02 39 04 + 15 00 02 3A 08 + 15 00 02 3B 08 + 15 00 02 3C 7C + 15 00 02 3D FF + 15 00 02 3E FF + 15 00 02 3F FF + 15 00 02 40 06 + 15 00 02 41 A0 + 15 00 02 43 08 + 15 00 02 44 0B + 15 00 02 45 88 + 15 00 02 4B 04 + 15 00 02 55 01 + 15 00 02 56 01 + 15 00 02 57 8D + 15 00 02 58 0A + 15 00 02 59 0A + 15 00 02 5A 28 + 15 00 02 5B 1E + 15 00 02 5C 16 + 15 00 02 5D 76 + 15 00 02 5E 58 + 15 00 02 5F 46 + 15 00 02 60 39 + 15 00 02 61 37 + 15 00 02 62 2A + 15 00 02 63 2F + 15 00 02 64 18 + 15 00 02 65 39 + 15 00 02 66 38 + 15 00 02 67 3A + 15 00 02 68 5A + 15 00 02 69 46 + 15 00 02 6A 4C + 15 00 02 6B 3F + 15 00 02 6C 3D + 15 00 02 6D 2F + 15 00 02 6E 1E + 15 00 02 6F 00 + 15 00 02 70 76 + 15 00 02 71 58 + 15 00 02 72 46 + 15 00 02 73 39 + 15 00 02 74 33 + 15 00 02 75 22 + 15 00 02 76 27 + 15 00 02 77 14 + 15 00 02 78 29 + 15 00 02 79 2A + 15 00 02 7A 28 + 15 00 02 7B 46 + 15 00 02 7C 38 + 15 00 02 7D 3E + 15 00 02 7E 31 + 15 00 02 7F 29 + 15 00 02 80 1B + 15 00 02 81 0A + 15 00 02 82 00 + 15 00 02 E0 02 + 15 00 02 00 44 + 15 00 02 01 44 + 15 00 02 02 45 + 15 00 02 03 45 + 15 00 02 04 46 + 15 00 02 05 46 + 15 00 02 06 47 + 15 00 02 07 47 + 15 00 02 08 1D + 15 00 02 09 1D + 15 00 02 0A 1D + 15 00 02 0B 1D + 15 00 02 0C 1D + 15 00 02 0D 1D + 15 00 02 0E 1D + 15 00 02 0F 57 + 15 00 02 10 57 + 15 00 02 11 58 + 15 00 02 12 58 + 15 00 02 13 40 + 15 00 02 14 55 + 15 00 02 15 55 + 15 00 02 16 44 + 15 00 02 17 44 + 15 00 02 18 45 + 15 00 02 19 45 + 15 00 02 1A 46 + 15 00 02 1B 46 + 15 00 02 1C 47 + 15 00 02 1D 47 + 15 00 02 1E 1D + 15 00 02 1F 1D + 15 00 02 20 1D + 15 00 02 21 1D + 15 00 02 22 1D + 15 00 02 23 1D + 15 00 02 24 1D + 15 00 02 25 57 + 15 00 02 26 57 + 15 00 02 27 58 + 15 00 02 28 58 + 15 00 02 29 40 + 15 00 02 2A 55 + 15 00 02 2B 55 + 15 00 02 58 40 + 15 00 02 59 00 + 15 00 02 5A 00 + 15 00 02 5B 00 + 15 00 02 5C 0A + 15 00 02 5D 10 + 15 00 02 5E 01 + 15 00 02 5F 02 + 15 00 02 60 00 + 15 00 02 61 01 + 15 00 02 62 02 + 15 00 02 63 0B + 15 00 02 64 6A + 15 00 02 65 00 + 15 00 02 66 00 + 15 00 02 67 31 + 15 00 02 68 0B + 15 00 02 69 1E + 15 00 02 6A 6A + 15 00 02 6B 04 + 15 00 02 6C 00 + 15 00 02 6D 04 + 15 00 02 6E 00 + 15 00 02 6F 88 + 15 00 02 70 00 + 15 00 02 71 00 + 15 00 02 72 06 + 15 00 02 73 7B + 15 00 02 74 00 + 15 00 02 75 F8 + 15 00 02 76 00 + 15 00 02 77 0D + 15 00 02 78 14 + 15 00 02 79 00 + 15 00 02 7A 00 + 15 00 02 7B 00 + 15 00 02 7C 00 + 15 00 02 7D 03 + 15 00 02 7E 7B + 15 00 02 E0 00 + 15 00 02 E6 02 + 15 00 02 E7 06 + 15 80 01 11 + 15 16 01 29 + ]; + + panel-exit-sequence = [ + 05 00 01 28 + 05 00 01 10 + ]; + + display-timings { + native-mode = <&timing0>; + + timing0: timing0 { + clock-frequency = <68500000>; + hactive = <800>; + hfront-porch = <16>; + hsync-len = <16>; + hback-porch = <48>; + vactive = <1280>; + vfront-porch = <8>; + vsync-len = <4>; + vback-porch = <4>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + }; + }; +}; + +&mipi_dphy { + status = "okay"; +}; + +&dsi_in_vopl { + status = "disabled"; +}; + +&dsi_in_vopb { + status = "okay"; +}; + +&route_dsi { + connect = <&vopb_out_dsi>; + status = "okay"; +}; + +&rgb { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&lcdc_rgb_pins>; + pinctrl-1 = <&lcdc_sleep_pins>; + status = "okay"; + + ports { + port@1 { + reg = <1>; + + rgb_out_bridge: endpoint { + remote-endpoint = <&bridge_input_rgb>; + }; + }; + }; +}; + +&rgb_in_vopb { + status = "disabled"; +}; + +&rgb_in_vopl { + status = "okay"; +}; + +&route_rgb { + connect = <&vopl_out_rgb>; + status = "disabled"; +}; + +&pinctrl { + lcdc { + lcdc_rgb_pins: lcdc-rgb-pins { + rockchip,pins = + <3 RK_PA0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_DCLK */ + <3 RK_PA1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_HSYNC */ + <3 RK_PA2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_VSYNC */ + <3 RK_PA3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_DEN */ + <3 RK_PD3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D23 */ + <3 RK_PD2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D22 */ + <3 RK_PD1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D21 */ + <3 RK_PD0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D20 */ + <3 RK_PC7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D19 */ + <3 RK_PC6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D18 */ + <3 RK_PC5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D17 */ + <3 RK_PC4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D16 */ + <3 RK_PC3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D15 */ + <3 RK_PC2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D14 */ + <3 RK_PC1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D13 */ + <3 RK_PC0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D12 */ + <3 RK_PB7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D11 */ + <3 RK_PB6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D10 */ + <3 RK_PB5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D9 */ + <3 RK_PB4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D8 */ + <3 RK_PB3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D7 */ + <3 RK_PB2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D6 */ + <3 RK_PB1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D5 */ + <3 RK_PB0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D4 */ + <3 RK_PA7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D3 */ + <3 RK_PA6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D2 */ + <3 RK_PA5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D1 */ + <3 RK_PA4 RK_FUNC_1 &pcfg_pull_none_8ma>; /* LCDC_D0 */ + }; + + lcdc_sleep_pins: lcdc-sleep-pins { + rockchip,pins = + <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DCLK */ + <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_HSYNC */ + <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_VSYNC */ + <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DEN */ + <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D23 */ + <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D22 */ + <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D21 */ + <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D20 */ + <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D19 */ + <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D18 */ + <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D17 */ + <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D16 */ + <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D15 */ + <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D14 */ + <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D13 */ + <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D12 */ + <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D11 */ + <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D10 */ + <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D9 */ + <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D8 */ + <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D7 */ + <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D6 */ + <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D5 */ + <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D4 */ + <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D3 */ + <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D2 */ + <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D1 */ + <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; /* LCDC_D0 */ + }; + }; + + pmic { + pmic_int: pmic_int { + rockchip,pins = + <0 7 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&firmware_android { + compatible = "android,firmware"; + + fstab { + compatible = "android,fstab"; + + system { + compatible = "android,system"; + dev = "/dev/block/by-name/system"; + type = "ext4"; + mnt_flags = "ro,barrier=1,inode_readahead_blks=8"; + fsmgr_flags = "wait"; + }; + + vendor { + compatible = "android,vendor"; + dev = "/dev/block/by-name/vendor"; + type = "ext4"; + mnt_flags = "ro,barrier=1,inode_readahead_blks=8"; + fsmgr_flags = "wait"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-lvds.dts b/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-lvds.dts new file mode 100644 index 000000000000..7a9757812816 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-lvds.dts @@ -0,0 +1,973 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd + */ + +/dts-v1/; +#include +#include +#include +#include +#include +#include +#include +#include "px30.dtsi" +#include "px30-android.dtsi" + +/ { + model = "Rockchip PX30 AD R35 MB board"; + compatible = "rockchip,px30-ad-r35-mb", "rockchip,px30"; + + adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 2>; + io-channel-names = "buttons"; + poll-interval = <100>; + keyup-threshold-microvolt = <1800000>; + + esc-key { + linux,code = ; + label = "esc"; + press-threshold-microvolt = <1270000>; + }; + + home-key { + linux,code = ; + label = "home"; + press-threshold-microvolt = <602000>; + }; + + menu-key { + linux,code = ; + label = "menu"; + press-threshold-microvolt = <952000>; + }; + + vol-down-key { + linux,code = ; + label = "volume down"; + press-threshold-microvolt = <290000>; + }; + + vol-up-key { + linux,code = ; + label = "volume up"; + press-threshold-microvolt = <17000>; + }; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm1 0 25000 0>; + brightness-levels = < + 0 1 2 3 4 5 6 7 + 8 9 10 11 12 13 14 15 + 16 17 18 19 20 21 22 23 + 24 25 26 27 28 29 30 31 + 32 33 34 35 36 37 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255>; + default-brightness-level = <200>; + enable-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; + }; + + panel { + compatible = "chunghwa,claa101wh31-cw", "simple-panel"; + backlight = <&backlight>; + power-supply = <&vcc3v3_lcd>; + enable-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_LOW>; + prepare-delay-ms = <120>; + enable-delay-ms = <120>; + disable-delay-ms = <120>; + unprepare-delay-ms = <120>; + bus-format = ; /* vesa-24 */ + width-mm = <231>; + height-mm = <154>; + + display-timings { + native-mode = <&timing1>; + + timing1: timing1 { + clock-frequency = <72000000>; + hactive = <1280>; + vactive = <800>; + hback-porch = <60>; + hfront-porch = <60>; + vback-porch = <16>; + vfront-porch = <16>; + hsync-len = <40>; + vsync-len = <6>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + }; + + port { + panel_input_lvds: endpoint { + remote-endpoint = <&lvds_output_panel>; + }; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + + /* + * On the module itself this is one of these (depending + * on the actual card populated): + * - SDIO_RESET_L_WL_REG_ON + * - PDN (power down when low) + */ + reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; + }; + + vcc_phy: vcc-phy-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_phy"; + regulator-always-on; + regulator-boot-on; + }; + + vcc5v0_sys: vccsys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; +}; + +&cpu0 { + cpu-supply = <&vdd_arm>; +}; + +&display_subsystem { + status = "okay"; +}; + +&dfi { + status = "okay"; +}; + +&dmc { + center-supply = <&vdd_logic>; + status = "okay"; +}; + +&emmc { + bus-width = <8>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + supports-emmc; + disable-wp; + non-removable; + num-slots = <1>; + status = "okay"; +}; + +&gpu { + mali-supply = <&vdd_logic>; + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + rk809: pmic@20 { + compatible = "rockchip,rk809"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = <7 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int>; + rockchip,system-power-controller; + wakeup-source; + #clock-cells = <1>; + clock-output-names = "rk808-clkout1", "rk808-clkout2"; + + vcc1-supply = <&vcc5v0_sys>; + vcc2-supply = <&vcc5v0_sys>; + vcc3-supply = <&vcc5v0_sys>; + vcc4-supply = <&vcc5v0_sys>; + vcc5-supply = <&vcc3v3_sys>; + vcc6-supply = <&vcc3v3_sys>; + vcc7-supply = <&vcc3v3_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc5v0_sys>; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x1>; + regulator-name = "vdd_logic"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <950000>; + }; + }; + + vdd_arm: DCDC_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x1>; + regulator-name = "vdd_arm"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <950000>; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_ddr"; + regulator-initial-mode = <0x1>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_3v0: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-initial-mode = <0x1>; + regulator-name = "vcc_3v0"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <3000000>; + }; + }; + + vcc_1v0: LDO_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vcc_1v0"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc1v8_soc: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc1v8_soc"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd1v0_soc: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vcc1v0_soc"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc3v0_pmu: LDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v0_pmu"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + + }; + }; + + vccio_sd: LDO_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_sd: LDO_REG6 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_sd"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + + }; + }; + + vcc2v8_dvp: LDO_REG7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-name = "vcc2v8_dvp"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <2800000>; + }; + }; + + vcc1v8_dvp: LDO_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc1v8_dvp"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd1v5_dvp: LDO_REG9 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vdd1v5_dvp"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <1500000>; + }; + }; + + vcc3v3_sys: DCDC_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3_sys"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc3v3_lcd: SWITCH_REG1 { + regulator-boot-on; + regulator-name = "vcc3v3_lcd"; + }; + + vcc5v0_host: SWITCH_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc5v0_host"; + }; + }; + }; + + rk618@50 { + compatible = "rockchip,rk618"; + reg = <0x50>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s1_2ch_mclk>; + clocks = <&cru SCLK_I2S1_OUT>; + clock-names = "clkin"; + assigned-clocks = <&cru SCLK_I2S1_OUT>; + assigned-clock-rates = <12000000>; + reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; + status = "okay"; + + CRU: cru { + compatible = "rockchip,rk618-cru"; + clocks = <&cru SCLK_I2S1_OUT>, <&cru DCLK_VOPL>; + clock-names = "clkin", "lcdc0_dclkp"; + assigned-clocks = <&CRU SCALER_PLLIN_CLK>, <&CRU VIF_PLLIN_CLK>, + <&CRU SCALER_CLK>, <&CRU VIF0_PRE_CLK>, + <&CRU CODEC_CLK>, <&CRU DITHER_CLK>; + assigned-clock-parents = <&cru SCLK_I2S1_OUT>, <&CRU LCDC0_CLK>, + <&CRU SCALER_PLL_CLK>, <&CRU VIF_PLL_CLK>, + <&cru SCLK_I2S1_OUT>, <&CRU VIF0_CLK>; + #clock-cells = <1>; + status = "okay"; + }; + + lvds { + compatible = "rockchip,rk618-lvds"; + clocks = <&CRU LVDS_CLK>; + clock-names = "lvds"; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + bridge_input_rgb: endpoint { + remote-endpoint = <&rgb_out_bridge>; + }; + }; + + port@1 { + reg = <1>; + + lvds_output_panel: endpoint { + remote-endpoint = <&panel_input_lvds>; + }; + }; + }; + }; + }; +}; + +&io_domains { + vccio1-supply = <&vcc1v8_soc>; + vccio2-supply = <&vccio_sd>; + vccio3-supply = <&vcc_3v0>; + vccio4-supply = <&vcc3v0_pmu>; + vccio5-supply = <&vcc_3v0>; + status = "okay"; +}; + +&nandc0 { + status = "okay"; +}; + +&pmu_io_domains { + pmuio1-supply = <&vcc3v0_pmu>; + pmuio2-supply = <&vcc3v0_pmu>; + status = "okay"; +}; + +&pwm1 { + status = "okay"; +}; + +&saradc { + vref-supply = <&vcc1v8_soc>; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + supports-sd; + card-detect-delay = <800>; + ignore-pm-notify; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + sd-uhs-sdr104; + vqmmc-supply = <&vccio_sd>; + vmmc-supply = <&vcc_sd>; + status = "okay"; +}; + +&sdio { + bus-width = <4>; + cap-sd-highspeed; + supports-sdio; + ignore-pm-notify; + keep-power-in-suspend; + non-removable; + mmc-pwrseq = <&sdio_pwrseq>; + sd-uhs-sdr104; + status = "okay"; +}; + +&tsadc { + pinctrl-names = "init", "default"; + pinctrl-0 = <&tsadc_otp_gpio>; + pinctrl-1 = <&tsadc_otp_out>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_xfer &uart1_cts>; + status = "okay"; +}; + +&u2phy { + status = "okay"; + + u2phy_host: host-port { + status = "okay"; + }; + + u2phy_otg: otg-port { + status = "okay"; + }; +}; + +&usb20_otg { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&vopb { + status = "okay"; +}; + +&vopb_mmu { + status = "okay"; +}; + +&vopl { + status = "okay"; +}; + +&vopl_mmu { + status = "okay"; +}; + +&vpu_combo { + status = "okay"; +}; + +&dsi { + status = "okay"; + + panel@0 { + compatible = "pvo,p101nwwbp-01g", "simple-panel-dsi"; + reg = <0>; + power-supply = <&vcc3v3_lcd>; + backlight = <&backlight>; + prepare-delay-ms = <20>; + reset-delay-ms = <20>; + init-delay-ms = <20>; + enable-delay-ms = <20>; + disable-delay-ms = <20>; + unprepare-delay-ms = <20>; + + width-mm = <135>; + height-mm = <216>; + + dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; + dsi,format = ; + dsi,lanes = <4>; + + panel-init-sequence = [ + 15 00 02 E0 00 + 15 00 02 E1 93 + 15 00 02 E2 65 + 15 00 02 E3 F8 + 15 00 02 80 03 + 15 00 02 E0 04 + 15 00 02 2B 2B + 15 00 02 2D 03 + 15 00 02 2E 44 + 15 00 02 E0 01 + 15 00 02 00 00 + 15 00 02 01 6D + 15 00 02 0C 74 + 15 00 02 17 00 + 15 00 02 18 A7 + 15 00 02 19 01 + 15 00 02 1A 00 + 15 00 02 1B A7 + 15 00 02 1C 01 + 15 00 02 1F 6A + 15 00 02 20 23 + 15 00 02 21 23 + 15 00 02 22 0E + 15 00 02 35 28 + 15 00 02 37 59 + 15 00 02 38 05 + 15 00 02 39 04 + 15 00 02 3A 08 + 15 00 02 3B 08 + 15 00 02 3C 7C + 15 00 02 3D FF + 15 00 02 3E FF + 15 00 02 3F FF + 15 00 02 40 06 + 15 00 02 41 A0 + 15 00 02 43 08 + 15 00 02 44 0B + 15 00 02 45 88 + 15 00 02 4B 04 + 15 00 02 55 01 + 15 00 02 56 01 + 15 00 02 57 8D + 15 00 02 58 0A + 15 00 02 59 0A + 15 00 02 5A 28 + 15 00 02 5B 1E + 15 00 02 5C 16 + 15 00 02 5D 76 + 15 00 02 5E 58 + 15 00 02 5F 46 + 15 00 02 60 39 + 15 00 02 61 37 + 15 00 02 62 2A + 15 00 02 63 2F + 15 00 02 64 18 + 15 00 02 65 39 + 15 00 02 66 38 + 15 00 02 67 3A + 15 00 02 68 5A + 15 00 02 69 46 + 15 00 02 6A 4C + 15 00 02 6B 3F + 15 00 02 6C 3D + 15 00 02 6D 2F + 15 00 02 6E 1E + 15 00 02 6F 00 + 15 00 02 70 76 + 15 00 02 71 58 + 15 00 02 72 46 + 15 00 02 73 39 + 15 00 02 74 33 + 15 00 02 75 22 + 15 00 02 76 27 + 15 00 02 77 14 + 15 00 02 78 29 + 15 00 02 79 2A + 15 00 02 7A 28 + 15 00 02 7B 46 + 15 00 02 7C 38 + 15 00 02 7D 3E + 15 00 02 7E 31 + 15 00 02 7F 29 + 15 00 02 80 1B + 15 00 02 81 0A + 15 00 02 82 00 + 15 00 02 E0 02 + 15 00 02 00 44 + 15 00 02 01 44 + 15 00 02 02 45 + 15 00 02 03 45 + 15 00 02 04 46 + 15 00 02 05 46 + 15 00 02 06 47 + 15 00 02 07 47 + 15 00 02 08 1D + 15 00 02 09 1D + 15 00 02 0A 1D + 15 00 02 0B 1D + 15 00 02 0C 1D + 15 00 02 0D 1D + 15 00 02 0E 1D + 15 00 02 0F 57 + 15 00 02 10 57 + 15 00 02 11 58 + 15 00 02 12 58 + 15 00 02 13 40 + 15 00 02 14 55 + 15 00 02 15 55 + 15 00 02 16 44 + 15 00 02 17 44 + 15 00 02 18 45 + 15 00 02 19 45 + 15 00 02 1A 46 + 15 00 02 1B 46 + 15 00 02 1C 47 + 15 00 02 1D 47 + 15 00 02 1E 1D + 15 00 02 1F 1D + 15 00 02 20 1D + 15 00 02 21 1D + 15 00 02 22 1D + 15 00 02 23 1D + 15 00 02 24 1D + 15 00 02 25 57 + 15 00 02 26 57 + 15 00 02 27 58 + 15 00 02 28 58 + 15 00 02 29 40 + 15 00 02 2A 55 + 15 00 02 2B 55 + 15 00 02 58 40 + 15 00 02 59 00 + 15 00 02 5A 00 + 15 00 02 5B 00 + 15 00 02 5C 0A + 15 00 02 5D 10 + 15 00 02 5E 01 + 15 00 02 5F 02 + 15 00 02 60 00 + 15 00 02 61 01 + 15 00 02 62 02 + 15 00 02 63 0B + 15 00 02 64 6A + 15 00 02 65 00 + 15 00 02 66 00 + 15 00 02 67 31 + 15 00 02 68 0B + 15 00 02 69 1E + 15 00 02 6A 6A + 15 00 02 6B 04 + 15 00 02 6C 00 + 15 00 02 6D 04 + 15 00 02 6E 00 + 15 00 02 6F 88 + 15 00 02 70 00 + 15 00 02 71 00 + 15 00 02 72 06 + 15 00 02 73 7B + 15 00 02 74 00 + 15 00 02 75 F8 + 15 00 02 76 00 + 15 00 02 77 0D + 15 00 02 78 14 + 15 00 02 79 00 + 15 00 02 7A 00 + 15 00 02 7B 00 + 15 00 02 7C 00 + 15 00 02 7D 03 + 15 00 02 7E 7B + 15 00 02 E0 00 + 15 00 02 E6 02 + 15 00 02 E7 06 + 15 80 01 11 + 15 16 01 29 + ]; + + panel-exit-sequence = [ + 05 00 01 28 + 05 00 01 10 + ]; + + display-timings { + native-mode = <&timing0>; + + timing0: timing0 { + clock-frequency = <68500000>; + hactive = <800>; + hfront-porch = <16>; + hsync-len = <16>; + hback-porch = <48>; + vactive = <1280>; + vfront-porch = <8>; + vsync-len = <4>; + vback-porch = <4>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + }; + }; +}; + +&mipi_dphy { + status = "okay"; +}; + +&dsi_in_vopl { + status = "disabled"; +}; + +&dsi_in_vopb { + status = "okay"; +}; + +&route_dsi { + connect = <&vopb_out_dsi>; + status = "okay"; +}; + +&rgb { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&lcdc_rgb_pins>; + pinctrl-1 = <&lcdc_sleep_pins>; + status = "okay"; + + ports { + port@1 { + reg = <1>; + + rgb_out_bridge: endpoint { + remote-endpoint = <&bridge_input_rgb>; + }; + }; + }; +}; + +&rgb_in_vopb { + status = "disabled"; +}; + +&rgb_in_vopl { + status = "okay"; +}; + +&route_rgb { + connect = <&vopl_out_rgb>; + status = "disabled"; +}; + +&pinctrl { + lcdc { + lcdc_rgb_pins: lcdc-rgb-pins { + rockchip,pins = + <3 RK_PA0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_DCLK */ + <3 RK_PA1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_HSYNC */ + <3 RK_PA2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_VSYNC */ + <3 RK_PA3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_DEN */ + <3 RK_PD3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D23 */ + <3 RK_PD2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D22 */ + <3 RK_PD1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D21 */ + <3 RK_PD0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D20 */ + <3 RK_PC7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D19 */ + <3 RK_PC6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D18 */ + <3 RK_PC5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D17 */ + <3 RK_PC4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D16 */ + <3 RK_PC3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D15 */ + <3 RK_PC2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D14 */ + <3 RK_PC1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D13 */ + <3 RK_PC0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D12 */ + <3 RK_PB7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D11 */ + <3 RK_PB6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D10 */ + <3 RK_PB5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D9 */ + <3 RK_PB4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D8 */ + <3 RK_PB3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D7 */ + <3 RK_PB2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D6 */ + <3 RK_PB1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D5 */ + <3 RK_PB0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D4 */ + <3 RK_PA7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D3 */ + <3 RK_PA6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D2 */ + <3 RK_PA5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D1 */ + <3 RK_PA4 RK_FUNC_1 &pcfg_pull_none_8ma>; /* LCDC_D0 */ + }; + + lcdc_sleep_pins: lcdc-sleep-pins { + rockchip,pins = + <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DCLK */ + <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_HSYNC */ + <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_VSYNC */ + <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DEN */ + <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D23 */ + <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D22 */ + <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D21 */ + <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D20 */ + <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D19 */ + <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D18 */ + <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D17 */ + <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D16 */ + <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D15 */ + <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D14 */ + <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D13 */ + <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D12 */ + <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D11 */ + <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D10 */ + <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D9 */ + <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D8 */ + <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D7 */ + <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D6 */ + <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D5 */ + <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D4 */ + <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D3 */ + <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D2 */ + <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D1 */ + <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; /* LCDC_D0 */ + }; + }; + + pmic { + pmic_int: pmic_int { + rockchip,pins = + <0 7 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&firmware_android { + compatible = "android,firmware"; + + fstab { + compatible = "android,fstab"; + + system { + compatible = "android,system"; + dev = "/dev/block/by-name/system"; + type = "ext4"; + mnt_flags = "ro,barrier=1,inode_readahead_blks=8"; + fsmgr_flags = "wait"; + }; + + vendor { + compatible = "android,vendor"; + dev = "/dev/block/by-name/vendor"; + type = "ext4"; + mnt_flags = "ro,barrier=1,inode_readahead_blks=8"; + fsmgr_flags = "wait"; + }; + }; +};