From 08e4dd1d12acc02244b119790c8e50bbf3618a89 Mon Sep 17 00:00:00 2001 From: Peter Rosin Date: Fri, 28 Apr 2023 10:06:35 +0200 Subject: [PATCH 1/7] ARM: dts: at91: tse850: add properties for gpio-line-names Signal names are one-to-one copies from the schematics, except VBUS which is an unnamed signal there. Signed-off-by: Peter Rosin [claudiu.beznea: add 1 indentation tab before index based comment] Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/32995b53-7f73-936f-a81d-5f1969f64910@axentia.se --- arch/arm/boot/dts/at91-tse850-3.dts | 60 +++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) diff --git a/arch/arm/boot/dts/at91-tse850-3.dts b/arch/arm/boot/dts/at91-tse850-3.dts index b99a4fb44a36..9d58a3931207 100644 --- a/arch/arm/boot/dts/at91-tse850-3.dts +++ b/arch/arm/boot/dts/at91-tse850-3.dts @@ -300,3 +300,63 @@ dmas = <0>, <0>; /* Do not use DMA for dbgu */ }; + +&pioA { + gpio-line-names = + /* 0 */ "SUP-A", "SUP-B", "SUP-C", "SIGLIN", + /* 28 */ "RXD", "TXD", "BRX", "BTX"; +}; + +&pioC { + gpio-line-names = + /* 0 */ "ETX0", "ETX1", "ERX0", "ERX1", + /* 4 */ "ETXEN", "ECRSDV", "ERXER", "EREFCK", + /* 8 */ "EMDC", "EMDIO", "", "", + /* 12 */ "", "", "", "/ILIM", + /* 16 */ "BCK", "LRCK", "DIN", "", + /* 20 */ "", "", "", "", + /* 24 */ "", "", "", "", + /* 28 */ "", "", "", "VBUS"; +}; + +&pioD { + gpio-line-names = + /* 0 */ "I1", "I2", "O1", "EXTVEN", + /* 4 */ "", "456KHZ", "VCTRL", "SYNCSEL", + /* 8 */ "STEREO", "", "", "", + /* 12 */ "", "", "", "", + /* 16 */ "", ">LIN", "LIN>", "", + /* 20 */ "VREFEN", "", "", "", + /* 24 */ "", "", "VINOK", "", + /* 28 */ "POEOK", "USBON", "POELOAD", ""; +}; + +&pioE { + gpio-line-names = + /* 0 */ "", "", "", "", + /* 4 */ "", "", "", "", + /* 8 */ "", "", "", "", + /* 12 */ "", "", "", "", + /* 16 */ "", "", "", "", + /* 20 */ "", "ALE", "CLE", "", + /* 24 */ "", "", "", "", + /* 28 */ "", "", "", "/ETHINT"; +}; From d08f92bdfb2dc4a2a14237cfd8a22c568781797c Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Wed, 17 May 2023 12:41:15 +0300 Subject: [PATCH 2/7] ARM: dts: at91: use clock-controller name for PMC nodes Use clock-controller generic name for PMC nodes. Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20230517094119.2894220-2-claudiu.beznea@microchip.com --- arch/arm/boot/dts/at91rm9200.dtsi | 2 +- arch/arm/boot/dts/at91sam9260.dtsi | 2 +- arch/arm/boot/dts/at91sam9261.dtsi | 2 +- arch/arm/boot/dts/at91sam9263.dtsi | 2 +- arch/arm/boot/dts/at91sam9g20.dtsi | 2 +- arch/arm/boot/dts/at91sam9g25.dtsi | 2 +- arch/arm/boot/dts/at91sam9g35.dtsi | 2 +- arch/arm/boot/dts/at91sam9g45.dtsi | 2 +- arch/arm/boot/dts/at91sam9n12.dtsi | 2 +- arch/arm/boot/dts/at91sam9rl.dtsi | 2 +- arch/arm/boot/dts/at91sam9x25.dtsi | 2 +- arch/arm/boot/dts/at91sam9x35.dtsi | 2 +- arch/arm/boot/dts/at91sam9x5.dtsi | 2 +- arch/arm/boot/dts/sam9x60.dtsi | 2 +- arch/arm/boot/dts/sama5d2.dtsi | 2 +- arch/arm/boot/dts/sama5d3.dtsi | 2 +- arch/arm/boot/dts/sama5d3_emac.dtsi | 2 +- arch/arm/boot/dts/sama5d4.dtsi | 2 +- arch/arm/boot/dts/sama7g5.dtsi | 2 +- 19 files changed, 19 insertions(+), 19 deletions(-) diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi index 6f9004ebf424..37b500f6f395 100644 --- a/arch/arm/boot/dts/at91rm9200.dtsi +++ b/arch/arm/boot/dts/at91rm9200.dtsi @@ -102,7 +102,7 @@ reg = <0xffffff00 0x100>; }; - pmc: pmc@fffffc00 { + pmc: clock-controller@fffffc00 { compatible = "atmel,at91rm9200-pmc", "syscon"; reg = <0xfffffc00 0x100>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi index 789fe356dbf6..16e3b24b4ddd 100644 --- a/arch/arm/boot/dts/at91sam9260.dtsi +++ b/arch/arm/boot/dts/at91sam9260.dtsi @@ -115,7 +115,7 @@ reg = <0xffffee00 0x200>; }; - pmc: pmc@fffffc00 { + pmc: clock-controller@fffffc00 { compatible = "atmel,at91sam9260-pmc", "syscon"; reg = <0xfffffc00 0x100>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi index ee0bd1aceb3f..fe9ead867e2a 100644 --- a/arch/arm/boot/dts/at91sam9261.dtsi +++ b/arch/arm/boot/dts/at91sam9261.dtsi @@ -599,7 +599,7 @@ }; }; - pmc: pmc@fffffc00 { + pmc: clock-controller@fffffc00 { compatible = "atmel,at91sam9261-pmc", "syscon"; reg = <0xfffffc00 0x100>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi index 3ce9ea987312..ee5e6ed44dd4 100644 --- a/arch/arm/boot/dts/at91sam9263.dtsi +++ b/arch/arm/boot/dts/at91sam9263.dtsi @@ -101,7 +101,7 @@ atmel,external-irqs = <30 31>; }; - pmc: pmc@fffffc00 { + pmc: clock-controller@fffffc00 { compatible = "atmel,at91sam9263-pmc", "syscon"; reg = <0xfffffc00 0x100>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi b/arch/arm/boot/dts/at91sam9g20.dtsi index 708e1646b7f4..738a43ffd228 100644 --- a/arch/arm/boot/dts/at91sam9g20.dtsi +++ b/arch/arm/boot/dts/at91sam9g20.dtsi @@ -41,7 +41,7 @@ atmel,adc-startup-time = <40>; }; - pmc: pmc@fffffc00 { + pmc: clock-controller@fffffc00 { compatible = "atmel,at91sam9g20-pmc", "atmel,at91sam9260-pmc", "syscon"; }; }; diff --git a/arch/arm/boot/dts/at91sam9g25.dtsi b/arch/arm/boot/dts/at91sam9g25.dtsi index d2f13afb35ea..ec3c77221881 100644 --- a/arch/arm/boot/dts/at91sam9g25.dtsi +++ b/arch/arm/boot/dts/at91sam9g25.dtsi @@ -26,7 +26,7 @@ >; }; - pmc: pmc@fffffc00 { + pmc: clock-controller@fffffc00 { compatible = "atmel,at91sam9g25-pmc", "atmel,at91sam9x5-pmc", "syscon"; }; }; diff --git a/arch/arm/boot/dts/at91sam9g35.dtsi b/arch/arm/boot/dts/at91sam9g35.dtsi index 48c2bc4a7753..c9cfb93092ee 100644 --- a/arch/arm/boot/dts/at91sam9g35.dtsi +++ b/arch/arm/boot/dts/at91sam9g35.dtsi @@ -25,7 +25,7 @@ >; }; - pmc: pmc@fffffc00 { + pmc: clock-controller@fffffc00 { compatible = "atmel,at91sam9g35-pmc", "atmel,at91sam9x5-pmc", "syscon"; }; }; diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi index 95f5d76234db..76afeb31b7f5 100644 --- a/arch/arm/boot/dts/at91sam9g45.dtsi +++ b/arch/arm/boot/dts/at91sam9g45.dtsi @@ -129,7 +129,7 @@ reg = <0xffffea00 0x200>; }; - pmc: pmc@fffffc00 { + pmc: clock-controller@fffffc00 { compatible = "atmel,at91sam9g45-pmc", "syscon"; reg = <0xfffffc00 0x100>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi index 83114d26f10d..c2e7460fb7ff 100644 --- a/arch/arm/boot/dts/at91sam9n12.dtsi +++ b/arch/arm/boot/dts/at91sam9n12.dtsi @@ -118,7 +118,7 @@ reg = <0xffffea00 0x200>; }; - pmc: pmc@fffffc00 { + pmc: clock-controller@fffffc00 { compatible = "atmel,at91sam9n12-pmc", "syscon"; reg = <0xfffffc00 0x200>; #clock-cells = <2>; diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi index 364a2ff0a763..a12e6c419fe3 100644 --- a/arch/arm/boot/dts/at91sam9rl.dtsi +++ b/arch/arm/boot/dts/at91sam9rl.dtsi @@ -763,7 +763,7 @@ }; }; - pmc: pmc@fffffc00 { + pmc: clock-controller@fffffc00 { compatible = "atmel,at91sam9rl-pmc", "syscon"; reg = <0xfffffc00 0x100>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; diff --git a/arch/arm/boot/dts/at91sam9x25.dtsi b/arch/arm/boot/dts/at91sam9x25.dtsi index 0fe8802e1242..7036f5f04571 100644 --- a/arch/arm/boot/dts/at91sam9x25.dtsi +++ b/arch/arm/boot/dts/at91sam9x25.dtsi @@ -27,7 +27,7 @@ >; }; - pmc: pmc@fffffc00 { + pmc: clock-controller@fffffc00 { compatible = "atmel,at91sam9x25-pmc", "atmel,at91sam9x5-pmc", "syscon"; }; }; diff --git a/arch/arm/boot/dts/at91sam9x35.dtsi b/arch/arm/boot/dts/at91sam9x35.dtsi index 0bfa21f18f87..eb03b0497e37 100644 --- a/arch/arm/boot/dts/at91sam9x35.dtsi +++ b/arch/arm/boot/dts/at91sam9x35.dtsi @@ -26,7 +26,7 @@ >; }; - pmc: pmc@fffffc00 { + pmc: clock-controller@fffffc00 { compatible = "atmel,at91sam9x35-pmc", "atmel,at91sam9x5-pmc", "syscon"; }; }; diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index 0c26c925761b..af19ef2a875c 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi @@ -126,7 +126,7 @@ reg = <0xffffea00 0x200>; }; - pmc: pmc@fffffc00 { + pmc: clock-controller@fffffc00 { compatible = "atmel,at91sam9x5-pmc", "syscon"; reg = <0xfffffc00 0x200>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi index e67ede940071..89aafb9a8b0f 100644 --- a/arch/arm/boot/dts/sam9x60.dtsi +++ b/arch/arm/boot/dts/sam9x60.dtsi @@ -1282,7 +1282,7 @@ }; }; - pmc: pmc@fffffc00 { + pmc: clock-controller@fffffc00 { compatible = "microchip,sam9x60-pmc", "syscon"; reg = <0xfffffc00 0x200>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 14c35c12a115..86009dd28e62 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -284,7 +284,7 @@ clock-names = "dma_clk"; }; - pmc: pmc@f0014000 { + pmc: clock-controller@f0014000 { compatible = "atmel,sama5d2-pmc", "syscon"; reg = <0xf0014000 0x160>; interrupts = <74 IRQ_TYPE_LEVEL_HIGH 7>; diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi index bde8e92d60bb..4524a16322d1 100644 --- a/arch/arm/boot/dts/sama5d3.dtsi +++ b/arch/arm/boot/dts/sama5d3.dtsi @@ -1001,7 +1001,7 @@ }; }; - pmc: pmc@fffffc00 { + pmc: clock-controller@fffffc00 { compatible = "atmel,sama5d3-pmc", "syscon"; reg = <0xfffffc00 0x120>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; diff --git a/arch/arm/boot/dts/sama5d3_emac.dtsi b/arch/arm/boot/dts/sama5d3_emac.dtsi index 45226108850d..5d7ce13de8cc 100644 --- a/arch/arm/boot/dts/sama5d3_emac.dtsi +++ b/arch/arm/boot/dts/sama5d3_emac.dtsi @@ -30,7 +30,7 @@ }; }; - pmc: pmc@fffffc00 { + pmc: clock-controller@fffffc00 { }; macb1: ethernet@f802c000 { diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi index af62157ae214..e94f3a661f4b 100644 --- a/arch/arm/boot/dts/sama5d4.dtsi +++ b/arch/arm/boot/dts/sama5d4.dtsi @@ -250,7 +250,7 @@ clock-names = "dma_clk"; }; - pmc: pmc@f0018000 { + pmc: clock-controller@f0018000 { compatible = "atmel,sama5d4-pmc", "syscon"; reg = <0xf0018000 0x120>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi index 929ba73702e9..b55adb96a06e 100644 --- a/arch/arm/boot/dts/sama7g5.dtsi +++ b/arch/arm/boot/dts/sama7g5.dtsi @@ -241,7 +241,7 @@ clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; }; - pmc: pmc@e0018000 { + pmc: clock-controller@e0018000 { compatible = "microchip,sama7g5-pmc", "syscon"; reg = <0xe0018000 0x200>; interrupts = ; From f4f15c5cdc289db798ab0bf32fe83a6701946ef9 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Wed, 17 May 2023 12:41:17 +0300 Subject: [PATCH 3/7] ARM: dts: at91: at91sam9n12: witch sckc to new clock bindings Switch slow clock controller to new clock bindings. Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20230517094119.2894220-4-claudiu.beznea@microchip.com --- arch/arm/boot/dts/at91sam9n12.dtsi | 23 +++-------------------- 1 file changed, 3 insertions(+), 20 deletions(-) diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi index c2e7460fb7ff..0e28101b26bf 100644 --- a/arch/arm/boot/dts/at91sam9n12.dtsi +++ b/arch/arm/boot/dts/at91sam9n12.dtsi @@ -146,28 +146,11 @@ clocks = <&clk32k>; }; - sckc@fffffe50 { + clk32k: clock-controller@fffffe50 { compatible = "atmel,at91sam9x5-sckc"; reg = <0xfffffe50 0x4>; - - slow_osc: slow_osc { - compatible = "atmel,at91sam9x5-clk-slow-osc"; - #clock-cells = <0>; - clocks = <&slow_xtal>; - }; - - slow_rc_osc: slow_rc_osc { - compatible = "atmel,at91sam9x5-clk-slow-rc-osc"; - #clock-cells = <0>; - clock-frequency = <32768>; - clock-accuracy = <50000000>; - }; - - clk32k: slck { - compatible = "atmel,at91sam9x5-clk-slow"; - #clock-cells = <0>; - clocks = <&slow_rc_osc>, <&slow_osc>; - }; + clocks = <&slow_xtal>; + #clock-cells = <0>; }; mmc0: mmc@f0008000 { From 3ecb546333089195b6a1508cb58627b0797a26ca Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Wed, 17 May 2023 12:41:18 +0300 Subject: [PATCH 4/7] ARM: dts: at91: use clock-controller name for sckc nodes Use clock-controller generic name for slow clock controller nodes. Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20230517094119.2894220-5-claudiu.beznea@microchip.com --- arch/arm/boot/dts/at91sam9g45.dtsi | 2 +- arch/arm/boot/dts/at91sam9rl.dtsi | 2 +- arch/arm/boot/dts/at91sam9x5.dtsi | 2 +- arch/arm/boot/dts/sam9x60.dtsi | 2 +- arch/arm/boot/dts/sama5d2.dtsi | 2 +- arch/arm/boot/dts/sama5d3.dtsi | 2 +- arch/arm/boot/dts/sama5d4.dtsi | 2 +- 7 files changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi index 76afeb31b7f5..498cb92b29f9 100644 --- a/arch/arm/boot/dts/at91sam9g45.dtsi +++ b/arch/arm/boot/dts/at91sam9g45.dtsi @@ -923,7 +923,7 @@ status = "disabled"; }; - clk32k: sckc@fffffd50 { + clk32k: clock-controller@fffffd50 { compatible = "atmel,at91sam9x5-sckc"; reg = <0xfffffd50 0x4>; clocks = <&slow_xtal>; diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi index a12e6c419fe3..d7e8a115c916 100644 --- a/arch/arm/boot/dts/at91sam9rl.dtsi +++ b/arch/arm/boot/dts/at91sam9rl.dtsi @@ -799,7 +799,7 @@ status = "disabled"; }; - clk32k: sckc@fffffd50 { + clk32k: clock-controller@fffffd50 { compatible = "atmel,at91sam9x5-sckc"; reg = <0xfffffd50 0x4>; clocks = <&slow_xtal>; diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index af19ef2a875c..0123ee47151c 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi @@ -154,7 +154,7 @@ clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; }; - clk32k: sckc@fffffe50 { + clk32k: clock-controller@fffffe50 { compatible = "atmel,at91sam9x5-sckc"; reg = <0xfffffe50 0x4>; clocks = <&slow_xtal>; diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi index 89aafb9a8b0f..c8bedfa987e5 100644 --- a/arch/arm/boot/dts/sam9x60.dtsi +++ b/arch/arm/boot/dts/sam9x60.dtsi @@ -1322,7 +1322,7 @@ clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; }; - clk32k: sckc@fffffe50 { + clk32k: clock-controller@fffffe50 { compatible = "microchip,sam9x60-sckc"; reg = <0xfffffe50 0x4>; clocks = <&slow_xtal>; diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 86009dd28e62..5f632e3f039e 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -704,7 +704,7 @@ status = "disabled"; }; - clk32k: sckc@f8048050 { + clk32k: clock-controller@f8048050 { compatible = "atmel,sama5d4-sckc"; reg = <0xf8048050 0x4>; diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi index 4524a16322d1..0eebf6c760b3 100644 --- a/arch/arm/boot/dts/sama5d3.dtsi +++ b/arch/arm/boot/dts/sama5d3.dtsi @@ -1040,7 +1040,7 @@ status = "disabled"; }; - clk32k: sckc@fffffe50 { + clk32k: clock-controller@fffffe50 { compatible = "atmel,sama5d3-sckc"; reg = <0xfffffe50 0x4>; clocks = <&slow_xtal>; diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi index e94f3a661f4b..de6c82969232 100644 --- a/arch/arm/boot/dts/sama5d4.dtsi +++ b/arch/arm/boot/dts/sama5d4.dtsi @@ -761,7 +761,7 @@ status = "disabled"; }; - clk32k: sckc@fc068650 { + clk32k: clock-controller@fc068650 { compatible = "atmel,sama5d4-sckc"; reg = <0xfc068650 0x4>; #clock-cells = <0>; From 23b76ba20e8737aca29e91af5b47a16b15fb1999 Mon Sep 17 00:00:00 2001 From: Horatiu Vultur Date: Fri, 21 Apr 2023 13:37:58 +0200 Subject: [PATCH 5/7] ARM: dts: lan966x: Add support for SMA connectors The pcb8309 has 2 SMA connectors which are connected to the lan966x chip. The lan966x can generate 1PPS output on one of them and it can receive 1PPS input on the other one. Signed-off-by: Horatiu Vultur Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20230421113758.3465678-1-horatiu.vultur@microchip.com --- arch/arm/boot/dts/lan966x-pcb8309.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/lan966x-pcb8309.dts b/arch/arm/boot/dts/lan966x-pcb8309.dts index c436cd20d4b4..0cb505f79ba1 100644 --- a/arch/arm/boot/dts/lan966x-pcb8309.dts +++ b/arch/arm/boot/dts/lan966x-pcb8309.dts @@ -144,6 +144,18 @@ function = "fc4_b"; }; + pps_out_pins: pps-out-pins { + /* 1pps output */ + pins = "GPIO_38"; + function = "ptpsync_3"; + }; + + ptp_ext_pins: ptp-ext-pins { + /* 1pps input */ + pins = "GPIO_39"; + function = "ptpsync_4"; + }; + sgpio_a_pins: sgpio-a-pins { /* SCK, D0, D1, LD */ pins = "GPIO_32", "GPIO_33", "GPIO_34", "GPIO_35"; @@ -212,5 +224,7 @@ }; &switch { + pinctrl-0 = <&pps_out_pins>, <&ptp_ext_pins>; + pinctrl-names = "default"; status = "okay"; }; From 1ebc72ceef2613ba39eaad6caa723a4ff0a04473 Mon Sep 17 00:00:00 2001 From: Ryan Wanner Date: Wed, 17 May 2023 13:54:06 +0200 Subject: [PATCH 6/7] ARM: dts: at91: Return to boolean properties Returning back to commit 0dc23d1a8e17 ("arm: dts: at91: Fix boolean properties with values") as pinctrl driver no longer expects an integer value and expects a simple boolean property. Signed-off-by: Ryan Wanner Acked-by: Nicolas Ferre Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/6f06be9e393c02563bc877498c8af75daf3b47f8.1684313910.git.Ryan.Wanner@microchip.com --- arch/arm/boot/dts/at91-kizbox3-hs.dts | 2 +- arch/arm/boot/dts/at91-kizbox3_common.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/at91-kizbox3-hs.dts b/arch/arm/boot/dts/at91-kizbox3-hs.dts index 7075df6549e9..fec7269088d1 100644 --- a/arch/arm/boot/dts/at91-kizbox3-hs.dts +++ b/arch/arm/boot/dts/at91-kizbox3-hs.dts @@ -225,7 +225,7 @@ pinctrl_pio_io_reset: gpio_io_reset { pinmux = ; bias-disable; - drive-open-drain = <1>; + drive-open-drain; output-low; }; pinctrl_pio_input: gpio_input { diff --git a/arch/arm/boot/dts/at91-kizbox3_common.dtsi b/arch/arm/boot/dts/at91-kizbox3_common.dtsi index abe27adfa4d6..465664628419 100644 --- a/arch/arm/boot/dts/at91-kizbox3_common.dtsi +++ b/arch/arm/boot/dts/at91-kizbox3_common.dtsi @@ -211,7 +211,7 @@ pinmux = , //DATA ; //CLK bias-disable; - drive-open-drain = <1>; + drive-open-drain; }; pinctrl_pwm0 { From 4ceb0c70d0dae0f1327c4cfda3826b98a885f735 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Mon, 22 May 2023 15:48:12 +0300 Subject: [PATCH 7/7] ARM: dts: at91: sama5d2: remove extra line Remove extra line from the definition of slow clock controller. Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20230522124812.107227-1-claudiu.beznea@microchip.com --- arch/arm/boot/dts/sama5d2.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 5f632e3f039e..7b6471655dee 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -707,7 +707,6 @@ clk32k: clock-controller@f8048050 { compatible = "atmel,sama5d4-sckc"; reg = <0xf8048050 0x4>; - clocks = <&slow_xtal>; #clock-cells = <0>; };