diff --git a/arch/arm/boot/dts/rk3288-android.dtsi b/arch/arm/boot/dts/rk3288-android.dtsi index a63cb6955559..824bdeaf1514 100644 --- a/arch/arm/boot/dts/rk3288-android.dtsi +++ b/arch/arm/boot/dts/rk3288-android.dtsi @@ -395,15 +395,6 @@ &cpu0_opp_table { rockchip,avs-enable = <1>; - clocks = <&cru PLL_APLL>; - leakage-scaling-sel = <0 254 25>; - - opp-1800000000 { - opp-hz = /bits/ 64 <1800000000>; - opp-microvolt = <1350000 1350000 1350000>; - clock-latency-ns = <40000>; - status = "disabled"; - }; }; &cpu1 { diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 6b075ef68157..4a428bfed5e1 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -131,14 +131,23 @@ compatible = "operating-points-v2"; opp-shared; + clocks = <&cru PLL_APLL>; rockchip,avs-scale = <17>; - nvmem-cells = <&cpu_leakage>; - nvmem-cell-names = "cpu_leakage"; - + rockchip,max-volt = <1350000>; + nvmem-cells = <&cpu_leakage>, <&special_function>, + <&performance>, <&process_version>; + nvmem-cell-names = "leakage", "special", + "performance", "process"; + rockchip,bin-scaling-sel = < + 0 17 + 1 25 + 2 31 + >; rockchip,pvtm-voltage-sel = < - 0 15000 0 - 15001 16000 1 - 16001 99999 2 + 0 14300 0 + 14301 15000 1 + 15001 16000 2 + 16001 99999 3 >; rockchip,pvtm-freq = <408000>; rockchip,pvtm-volt = <1000000>; @@ -146,97 +155,108 @@ rockchip,pvtm-sample-time = <1000>; rockchip,pvtm-number = <10>; rockchip,pvtm-error = <1000>; - rockchip,pvtm-ref-temp = <20>; - rockchip,pvtm-temp-prop = <12 12>; + rockchip,pvtm-ref-temp = <35>; + rockchip,pvtm-temp-prop = <(-18) (-18)>; rockchip,pvtm-thermal-zone = "soc-thermal"; opp-126000000 { opp-hz = /bits/ 64 <126000000>; - opp-microvolt = <900000 900000 1350000>; - opp-microvolt-L0 = <900000 900000 1350000>; - opp-microvolt-L1 = <900000 900000 1350000>; - opp-microvolt-L2 = <900000 900000 1350000>; + opp-microvolt = <950000 950000 1350000>; + opp-microvolt-L0 = <950000 950000 1350000>; + opp-microvolt-L1 = <950000 950000 1350000>; + opp-microvolt-L2 = <950000 950000 1350000>; + opp-microvolt-L3 = <950000 950000 1350000>; clock-latency-ns = <40000>; }; opp-216000000 { opp-hz = /bits/ 64 <216000000>; - opp-microvolt = <900000 900000 1350000>; - opp-microvolt-L0 = <900000 900000 1350000>; - opp-microvolt-L1 = <900000 900000 1350000>; - opp-microvolt-L2 = <900000 900000 1350000>; + opp-microvolt = <950000 950000 1350000>; + opp-microvolt-L0 = <950000 950000 1350000>; + opp-microvolt-L1 = <950000 950000 1350000>; + opp-microvolt-L2 = <950000 950000 1350000>; + opp-microvolt-L3 = <950000 950000 1350000>; clock-latency-ns = <40000>; }; opp-408000000 { opp-hz = /bits/ 64 <408000000>; - opp-microvolt = <900000 900000 1350000>; - opp-microvolt-L0 = <900000 900000 1350000>; - opp-microvolt-L1 = <900000 900000 1350000>; - opp-microvolt-L2 = <900000 900000 1350000>; + opp-microvolt = <975000 975000 1350000>; + opp-microvolt-L0 = <975000 975000 1350000>; + opp-microvolt-L1 = <950000 950000 1350000>; + opp-microvolt-L2 = <950000 950000 1350000>; + opp-microvolt-L3 = <950000 950000 1350000>; clock-latency-ns = <40000>; }; opp-600000000 { opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <900000 900000 1350000>; - opp-microvolt-L0 = <900000 900000 1350000>; - opp-microvolt-L1 = <900000 900000 1350000>; - opp-microvolt-L2 = <900000 900000 1350000>; + opp-microvolt = <975000 975000 1350000>; + opp-microvolt-L0 = <975000 975000 1350000>; + opp-microvolt-L1 = <950000 950000 1350000>; + opp-microvolt-L2 = <950000 950000 1350000>; + opp-microvolt-L3 = <950000 950000 1350000>; clock-latency-ns = <40000>; }; opp-696000000 { opp-hz = /bits/ 64 <696000000>; - opp-microvolt = <950000 950000 1350000>; - opp-microvolt-L0 = <950000 950000 1350000>; - opp-microvolt-L1 = <900000 900000 1350000>; - opp-microvolt-L2 = <900000 900000 1350000>; + opp-microvolt = <975000 975000 1350000>; + opp-microvolt-L0 = <975000 975000 1350000>; + opp-microvolt-L1 = <950000 950000 1350000>; + opp-microvolt-L2 = <950000 950000 1350000>; + opp-microvolt-L3 = <950000 950000 1350000>; clock-latency-ns = <40000>; }; opp-816000000 { opp-hz = /bits/ 64 <816000000>; - opp-microvolt = <1050000 1050000 1350000>; - opp-microvolt-L0 = <1050000 1050000 1350000>; - opp-microvolt-L1 = <1000000 1000000 1350000>; - opp-microvolt-L2 = <950000 950000 1350000>; + opp-microvolt = <1075000 1075000 1350000>; + opp-microvolt-L0 = <1075000 1075000 1350000>; + opp-microvolt-L1 = <1050000 1050000 1350000>; + opp-microvolt-L2 = <1000000 1000000 1350000>; + opp-microvolt-L3 = <950000 950000 1350000>; clock-latency-ns = <40000>; opp-suspend; }; opp-1008000000 { opp-hz = /bits/ 64 <1008000000>; - opp-microvolt = <1100000 1100000 1350000>; - opp-microvolt-L0 = <1100000 1100000 1350000>; - opp-microvolt-L1 = <1050000 1050000 1350000>; - opp-microvolt-L2 = <1000000 1000000 1350000>; - clock-latency-ns = <40000>; - }; - opp-1200000000 { - opp-hz = /bits/ 64 <1200000000>; opp-microvolt = <1150000 1150000 1350000>; opp-microvolt-L0 = <1150000 1150000 1350000>; opp-microvolt-L1 = <1100000 1100000 1350000>; opp-microvolt-L2 = <1050000 1050000 1350000>; + opp-microvolt-L3 = <1000000 1000000 1350000>; + clock-latency-ns = <40000>; + }; + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1200000 1200000 1350000>; + opp-microvolt-L0 = <1200000 1200000 1350000>; + opp-microvolt-L1 = <1150000 1150000 1350000>; + opp-microvolt-L2 = <1100000 1100000 1350000>; + opp-microvolt-L3 = <1050000 1050000 1350000>; clock-latency-ns = <40000>; }; opp-1416000000 { opp-hz = /bits/ 64 <1416000000>; - opp-microvolt = <1250000 1250000 1350000>; - opp-microvolt-L0 = <1250000 1250000 1350000>; - opp-microvolt-L1 = <1200000 1200000 1350000>; - opp-microvolt-L2 = <1150000 1150000 1350000>; + opp-microvolt = <1350000 1350000 1350000>; + opp-microvolt-L0 = <1350000 1350000 1350000>; + opp-microvolt-L1 = <1250000 1250000 1350000>; + opp-microvolt-L2 = <1200000 1200000 1350000>; + opp-microvolt-L3 = <1150000 1150000 1350000>; clock-latency-ns = <40000>; }; opp-1512000000 { opp-hz = /bits/ 64 <1512000000>; - opp-microvolt = <1300000 1300000 1350000>; - opp-microvolt-L0 = <1300000 1300000 1350000>; - opp-microvolt-L1 = <1250000 1250000 1350000>; - opp-microvolt-L2 = <1200000 1200000 1350000>; + opp-microvolt = <1350000 1350000 1350000>; + opp-microvolt-L0 = <1350000 1350000 1350000>; + opp-microvolt-L1 = <1300000 1300000 1350000>; + opp-microvolt-L2 = <1250000 1250000 1350000>; + opp-microvolt-L3 = <1200000 1200000 1350000>; clock-latency-ns = <40000>; }; opp-1608000000 { opp-hz = /bits/ 64 <1608000000>; opp-microvolt = <1350000 1350000 1350000>; opp-microvolt-L0 = <1350000 1350000 1350000>; - opp-microvolt-L1 = <1300000 1300000 1350000>; - opp-microvolt-L2 = <1250000 1250000 1350000>; + opp-microvolt-L1 = <1350000 1350000 1350000>; + opp-microvolt-L2 = <1300000 1300000 1350000>; + opp-microvolt-L3 = <1250000 1250000 1350000>; clock-latency-ns = <40000>; }; }; @@ -1709,9 +1729,9 @@ opp-hz = /bits/ 64 <400000000>; opp-microvolt = <1100000>; }; - opp-600000000 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <1250000>; + opp-480000000 { + opp-hz = /bits/ 64 <480000000>; + opp-microvolt = <1200000>; }; }; @@ -1763,12 +1783,24 @@ clocks = <&cru PCLK_EFUSE256>; clock-names = "pclk_efuse"; + special_function: special-function@5 { + reg = <0x5 0x1>; + bits = <4 4>; + }; + process_version: process-version@6 { + reg = <0x6 0x1>; + bits = <0 4>; + }; efuse_id: id@7 { reg = <0x7 0x10>; }; - cpu_leakage: cpu_leakage@17 { + cpu_leakage: cpu-leakage@17 { reg = <0x17 0x1>; }; + performance: performance@1d { + reg = <0x1d 0x1>; + bits = <4 3>; + }; }; gic: interrupt-controller@ffc01000 { diff --git a/arch/arm/boot/dts/rk3288cg-opp.dtsi b/arch/arm/boot/dts/rk3288cg-opp.dtsi new file mode 100644 index 000000000000..20987c29e3ef --- /dev/null +++ b/arch/arm/boot/dts/rk3288cg-opp.dtsi @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd + */ + +&cpu0_opp_table { + opp-1704000000 { + opp-hz = /bits/ 64 <1704000000>; + opp-microvolt = <1350000 1350000 1350000>; + opp-microvolt-L0 = <1350000 1350000 1350000>; + opp-microvolt-L1 = <1350000 1350000 1350000>; + opp-microvolt-L2 = <1350000 1350000 1350000>; + opp-microvolt-L3 = <1300000 1300000 1350000>; + clock-latency-ns = <40000>; + }; + opp-1800000000 { + opp-hz = /bits/ 64 <1800000000>; + opp-microvolt = <1350000 1350000 1350000>; + opp-microvolt-L0 = <1350000 1350000 1350000>; + opp-microvolt-L1 = <1350000 1350000 1350000>; + opp-microvolt-L2 = <1350000 1350000 1350000>; + opp-microvolt-L3 = <1350000 1350000 1350000>; + clock-latency-ns = <40000>; + }; +}; + +&gpu_opp_table { + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <1250000>; + }; +};