diff --git a/drivers/clk/rockchip/clk-rv1106.c b/drivers/clk/rockchip/clk-rv1106.c
index eb8b4b94e0e5..9717e8d1ec7b 100644
--- a/drivers/clk/rockchip/clk-rv1106.c
+++ b/drivers/clk/rockchip/clk-rv1106.c
@@ -275,28 +275,6 @@ static struct rockchip_clk_branch rv1106_clk_branches[] __initdata = {
 	GATE(PCLK_MAILBOX, "pclk_mailbox", "pclk_cpu_root", 0,
 			RV1106_CORECLKGATE_CON(1), 8, GFLAGS),
 
-	/* PD_DDR */
-	COMPOSITE_NODIV(PCLK_DDR_ROOT, "pclk_ddr_root", mux_100m_50m_24m_p, CLK_IS_CRITICAL,
-			RV1106_DDRCLKSEL_CON(0), 0, 2, MFLAGS,
-			RV1106_DDRCLKGATE_CON(0), 0, GFLAGS),
-	COMPOSITE_NODIV(ACLK_DDR_ROOT, "aclk_ddr_root", mux_500m_300m_100m_24m_p, CLK_IS_CRITICAL,
-			RV1106_DDRCLKSEL_CON(0), 8, 2, MFLAGS,
-			RV1106_DDRCLKGATE_CON(0), 12, GFLAGS),
-	GATE(PCLK_DDRPHY, "pclk_ddrphy", "pclk_ddr_root", CLK_IGNORE_UNUSED,
-			RV1106_DDRCLKGATE_CON(1), 3, GFLAGS),
-	GATE(PCLK_DDR_HWLP, "pclk_ddr_hwlp", "pclk_ddr_root", CLK_IGNORE_UNUSED,
-			RV1106_DDRCLKGATE_CON(1), 2, GFLAGS),
-	GATE(PCLK_DDRMON, "pclk_ddrmon", "pclk_ddr_root", 0,
-			RV1106_DDRCLKGATE_CON(0), 7, GFLAGS),
-	GATE(CLK_TIMER_DDRMON, "clk_timer_ddrmon", "xin24m", 0,
-			RV1106_DDRCLKGATE_CON(0), 8, GFLAGS),
-	GATE(PCLK_DDRC, "pclk_ddrc", "pclk_ddr_root", CLK_IGNORE_UNUSED,
-			RV1106_DDRCLKGATE_CON(0), 5, GFLAGS),
-	GATE(PCLK_DFICTRL, "pclk_dfictrl", "pclk_ddr_root", CLK_IS_CRITICAL,
-			RV1106_DDRCLKGATE_CON(0), 11, GFLAGS),
-	GATE(ACLK_SYS_SHRM, "aclk_sys_shrm", "aclk_ddr_root", CLK_IS_CRITICAL,
-			RV1106_DDRCLKGATE_CON(0), 13, GFLAGS),
-
 	/* PD _TOP */
 	COMPOSITE(CLK_50M_SRC, "clk_50m_src", mux_gpll_cpll_p, CLK_IS_CRITICAL,
 			RV1106_CLKSEL_CON(0), 5, 1, MFLAGS, 0, 5, DFLAGS,
@@ -447,6 +425,28 @@ static struct rockchip_clk_branch rv1106_clk_branches[] __initdata = {
 			RV1106_CLKSEL_CON(23), 8, 1, MFLAGS, 3, 5, DFLAGS,
 			RV1106_CLKGATE_CON(2), 6, GFLAGS),
 
+	/* PD_DDR */
+	COMPOSITE_NODIV(PCLK_DDR_ROOT, "pclk_ddr_root", mux_100m_50m_24m_p, CLK_IS_CRITICAL,
+			RV1106_DDRCLKSEL_CON(0), 0, 2, MFLAGS,
+			RV1106_DDRCLKGATE_CON(0), 0, GFLAGS),
+	COMPOSITE_NODIV(ACLK_DDR_ROOT, "aclk_ddr_root", mux_500m_300m_100m_24m_p, CLK_IS_CRITICAL,
+			RV1106_DDRCLKSEL_CON(0), 8, 2, MFLAGS,
+			RV1106_DDRCLKGATE_CON(0), 12, GFLAGS),
+	GATE(PCLK_DDRPHY, "pclk_ddrphy", "pclk_ddr_root", CLK_IGNORE_UNUSED,
+			RV1106_DDRCLKGATE_CON(1), 3, GFLAGS),
+	GATE(PCLK_DDR_HWLP, "pclk_ddr_hwlp", "pclk_ddr_root", CLK_IGNORE_UNUSED,
+			RV1106_DDRCLKGATE_CON(1), 2, GFLAGS),
+	GATE(PCLK_DDRMON, "pclk_ddrmon", "pclk_ddr_root", 0,
+			RV1106_DDRCLKGATE_CON(0), 7, GFLAGS),
+	GATE(CLK_TIMER_DDRMON, "clk_timer_ddrmon", "xin24m", 0,
+			RV1106_DDRCLKGATE_CON(0), 8, GFLAGS),
+	GATE(PCLK_DDRC, "pclk_ddrc", "pclk_ddr_root", CLK_IGNORE_UNUSED,
+			RV1106_DDRCLKGATE_CON(0), 5, GFLAGS),
+	GATE(PCLK_DFICTRL, "pclk_dfictrl", "pclk_ddr_root", CLK_IS_CRITICAL,
+			RV1106_DDRCLKGATE_CON(0), 11, GFLAGS),
+	GATE(ACLK_SYS_SHRM, "aclk_sys_shrm", "aclk_ddr_root", CLK_IS_CRITICAL,
+			RV1106_DDRCLKGATE_CON(0), 13, GFLAGS),
+
 	/* PD_NPU */
 	COMPOSITE_NODIV(HCLK_NPU_ROOT, "hclk_npu_root", mux_150m_100m_50m_24m_p, CLK_IS_CRITICAL,
 			RV1106_NPUCLKSEL_CON(0), 0, 2, MFLAGS,