From 4d9b36c6eb792e2d535fe8267a83dc3dab7591e3 Mon Sep 17 00:00:00 2001
From: Cliff Chen <cliff.chen@rock-chips.com>
Date: Mon, 23 Jun 2025 01:24:02 +0000
Subject: [PATCH] arm64: dts: rockchip: rk3576: Add CCI PMU support

Change-Id: I7127d15658fdb78fd2cc9e07c3c8bdd7d87fc8d7
Signed-off-by: Cliff Chen <cliff.chen@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3576.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
index 211d1f3420e4..1ce7b608be9d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
@@ -2493,6 +2493,28 @@
 		status = "disabled";
 	};
 
+	cci: cci@27500000 {
+		compatible = "arm,cci-500";
+		reg = <0x0 0x27500000 0x0 0x100000>;
+		ranges = <0x0 0x0 0x27500000 0x100000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		pmu@10000 {
+			compatible = "arm,cci-500-pmu,r0";
+			reg = <0x10000 0x80000>;
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>;
+		};
+	};
+
 	rknpu: npu@27700000 {
 		compatible = "rockchip,rk3576-rknpu";
 		reg = <0x0 0x27700000 0x0 0x8000>,