mirror of
https://github.com/hardkernel/linux.git
synced 2026-06-10 21:07:02 +09:00
Merge fc2f4a5a71 ("drm/rockchip: vop: enable VOP_FEATURE_INTERNAL_RGB on RK3066") into android14-6.1
Steps on the way to 6.1.113 Change-Id: I7413c9d094d0a17b4c6901c73a556bf4959a1402 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
@@ -222,6 +222,7 @@ struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
|
|||||||
if (bus) {
|
if (bus) {
|
||||||
memcpy(bus->sysdata, info->cfg, sizeof(struct pci_config_window));
|
memcpy(bus->sysdata, info->cfg, sizeof(struct pci_config_window));
|
||||||
kfree(info);
|
kfree(info);
|
||||||
|
kfree(root_ops);
|
||||||
} else {
|
} else {
|
||||||
struct pci_bus *child;
|
struct pci_bus *child;
|
||||||
|
|
||||||
|
|||||||
@@ -7,7 +7,7 @@
|
|||||||
#ifdef CONFIG_64BIT
|
#ifdef CONFIG_64BIT
|
||||||
#define MAX_PHYSMEM_BITS 56
|
#define MAX_PHYSMEM_BITS 56
|
||||||
#else
|
#else
|
||||||
#define MAX_PHYSMEM_BITS 34
|
#define MAX_PHYSMEM_BITS 32
|
||||||
#endif /* CONFIG_64BIT */
|
#endif /* CONFIG_64BIT */
|
||||||
#define SECTION_SIZE_BITS 27
|
#define SECTION_SIZE_BITS 27
|
||||||
#endif /* CONFIG_SPARSEMEM */
|
#endif /* CONFIG_SPARSEMEM */
|
||||||
|
|||||||
@@ -444,6 +444,12 @@ int arch_kexec_apply_relocations_add(struct purgatory_info *pi,
|
|||||||
*(u32 *)loc = CLEAN_IMM(CJTYPE, *(u32 *)loc) |
|
*(u32 *)loc = CLEAN_IMM(CJTYPE, *(u32 *)loc) |
|
||||||
ENCODE_CJTYPE_IMM(val - addr);
|
ENCODE_CJTYPE_IMM(val - addr);
|
||||||
break;
|
break;
|
||||||
|
case R_RISCV_ADD16:
|
||||||
|
*(u16 *)loc += val;
|
||||||
|
break;
|
||||||
|
case R_RISCV_SUB16:
|
||||||
|
*(u16 *)loc -= val;
|
||||||
|
break;
|
||||||
case R_RISCV_ADD32:
|
case R_RISCV_ADD32:
|
||||||
*(u32 *)loc += val;
|
*(u32 *)loc += val;
|
||||||
break;
|
break;
|
||||||
|
|||||||
@@ -104,7 +104,8 @@ static ssize_t bus_attr_show(struct kobject *kobj, struct attribute *attr,
|
|||||||
{
|
{
|
||||||
struct bus_attribute *bus_attr = to_bus_attr(attr);
|
struct bus_attribute *bus_attr = to_bus_attr(attr);
|
||||||
struct subsys_private *subsys_priv = to_subsys_private(kobj);
|
struct subsys_private *subsys_priv = to_subsys_private(kobj);
|
||||||
ssize_t ret = 0;
|
/* return -EIO for reading a bus attribute without show() */
|
||||||
|
ssize_t ret = -EIO;
|
||||||
|
|
||||||
if (bus_attr->show)
|
if (bus_attr->show)
|
||||||
ret = bus_attr->show(subsys_priv->bus, buf);
|
ret = bus_attr->show(subsys_priv->bus, buf);
|
||||||
@@ -116,7 +117,8 @@ static ssize_t bus_attr_store(struct kobject *kobj, struct attribute *attr,
|
|||||||
{
|
{
|
||||||
struct bus_attribute *bus_attr = to_bus_attr(attr);
|
struct bus_attribute *bus_attr = to_bus_attr(attr);
|
||||||
struct subsys_private *subsys_priv = to_subsys_private(kobj);
|
struct subsys_private *subsys_priv = to_subsys_private(kobj);
|
||||||
ssize_t ret = 0;
|
/* return -EIO for writing a bus attribute without store() */
|
||||||
|
ssize_t ret = -EIO;
|
||||||
|
|
||||||
if (bus_attr->store)
|
if (bus_attr->store)
|
||||||
ret = bus_attr->store(subsys_priv->bus, buf, count);
|
ret = bus_attr->store(subsys_priv->bus, buf, count);
|
||||||
|
|||||||
@@ -112,7 +112,7 @@ static void bcm53573_ilp_init(struct device_node *np)
|
|||||||
goto err_free_ilp;
|
goto err_free_ilp;
|
||||||
}
|
}
|
||||||
|
|
||||||
ilp->regmap = syscon_node_to_regmap(of_get_parent(np));
|
ilp->regmap = syscon_node_to_regmap(np->parent);
|
||||||
if (IS_ERR(ilp->regmap)) {
|
if (IS_ERR(ilp->regmap)) {
|
||||||
err = PTR_ERR(ilp->regmap);
|
err = PTR_ERR(ilp->regmap);
|
||||||
goto err_free_ilp;
|
goto err_free_ilp;
|
||||||
|
|||||||
@@ -498,9 +498,9 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node)
|
|||||||
hws[IMX7D_ENET_AXI_ROOT_SRC] = imx_clk_hw_mux2_flags("enet_axi_src", base + 0x8900, 24, 3, enet_axi_sel, ARRAY_SIZE(enet_axi_sel), CLK_SET_PARENT_GATE);
|
hws[IMX7D_ENET_AXI_ROOT_SRC] = imx_clk_hw_mux2_flags("enet_axi_src", base + 0x8900, 24, 3, enet_axi_sel, ARRAY_SIZE(enet_axi_sel), CLK_SET_PARENT_GATE);
|
||||||
hws[IMX7D_NAND_USDHC_BUS_ROOT_SRC] = imx_clk_hw_mux2_flags("nand_usdhc_src", base + 0x8980, 24, 3, nand_usdhc_bus_sel, ARRAY_SIZE(nand_usdhc_bus_sel), CLK_SET_PARENT_GATE);
|
hws[IMX7D_NAND_USDHC_BUS_ROOT_SRC] = imx_clk_hw_mux2_flags("nand_usdhc_src", base + 0x8980, 24, 3, nand_usdhc_bus_sel, ARRAY_SIZE(nand_usdhc_bus_sel), CLK_SET_PARENT_GATE);
|
||||||
hws[IMX7D_DRAM_PHYM_ROOT_SRC] = imx_clk_hw_mux2_flags("dram_phym_src", base + 0x9800, 24, 1, dram_phym_sel, ARRAY_SIZE(dram_phym_sel), CLK_SET_PARENT_GATE);
|
hws[IMX7D_DRAM_PHYM_ROOT_SRC] = imx_clk_hw_mux2_flags("dram_phym_src", base + 0x9800, 24, 1, dram_phym_sel, ARRAY_SIZE(dram_phym_sel), CLK_SET_PARENT_GATE);
|
||||||
hws[IMX7D_DRAM_ROOT_SRC] = imx_clk_hw_mux2_flags("dram_src", base + 0x9880, 24, 1, dram_sel, ARRAY_SIZE(dram_sel), CLK_SET_PARENT_GATE);
|
hws[IMX7D_DRAM_ROOT_SRC] = imx_clk_hw_mux2("dram_src", base + 0x9880, 24, 1, dram_sel, ARRAY_SIZE(dram_sel));
|
||||||
hws[IMX7D_DRAM_PHYM_ALT_ROOT_SRC] = imx_clk_hw_mux2_flags("dram_phym_alt_src", base + 0xa000, 24, 3, dram_phym_alt_sel, ARRAY_SIZE(dram_phym_alt_sel), CLK_SET_PARENT_GATE);
|
hws[IMX7D_DRAM_PHYM_ALT_ROOT_SRC] = imx_clk_hw_mux2_flags("dram_phym_alt_src", base + 0xa000, 24, 3, dram_phym_alt_sel, ARRAY_SIZE(dram_phym_alt_sel), CLK_SET_PARENT_GATE);
|
||||||
hws[IMX7D_DRAM_ALT_ROOT_SRC] = imx_clk_hw_mux2_flags("dram_alt_src", base + 0xa080, 24, 3, dram_alt_sel, ARRAY_SIZE(dram_alt_sel), CLK_SET_PARENT_GATE);
|
hws[IMX7D_DRAM_ALT_ROOT_SRC] = imx_clk_hw_mux2("dram_alt_src", base + 0xa080, 24, 3, dram_alt_sel, ARRAY_SIZE(dram_alt_sel));
|
||||||
hws[IMX7D_USB_HSIC_ROOT_SRC] = imx_clk_hw_mux2_flags("usb_hsic_src", base + 0xa100, 24, 3, usb_hsic_sel, ARRAY_SIZE(usb_hsic_sel), CLK_SET_PARENT_GATE);
|
hws[IMX7D_USB_HSIC_ROOT_SRC] = imx_clk_hw_mux2_flags("usb_hsic_src", base + 0xa100, 24, 3, usb_hsic_sel, ARRAY_SIZE(usb_hsic_sel), CLK_SET_PARENT_GATE);
|
||||||
hws[IMX7D_PCIE_CTRL_ROOT_SRC] = imx_clk_hw_mux2_flags("pcie_ctrl_src", base + 0xa180, 24, 3, pcie_ctrl_sel, ARRAY_SIZE(pcie_ctrl_sel), CLK_SET_PARENT_GATE);
|
hws[IMX7D_PCIE_CTRL_ROOT_SRC] = imx_clk_hw_mux2_flags("pcie_ctrl_src", base + 0xa180, 24, 3, pcie_ctrl_sel, ARRAY_SIZE(pcie_ctrl_sel), CLK_SET_PARENT_GATE);
|
||||||
hws[IMX7D_PCIE_PHY_ROOT_SRC] = imx_clk_hw_mux2_flags("pcie_phy_src", base + 0xa200, 24, 3, pcie_phy_sel, ARRAY_SIZE(pcie_phy_sel), CLK_SET_PARENT_GATE);
|
hws[IMX7D_PCIE_PHY_ROOT_SRC] = imx_clk_hw_mux2_flags("pcie_phy_src", base + 0xa200, 24, 3, pcie_phy_sel, ARRAY_SIZE(pcie_phy_sel), CLK_SET_PARENT_GATE);
|
||||||
|
|||||||
@@ -140,6 +140,11 @@ int main(void)
|
|||||||
{
|
{
|
||||||
FILE *fp = fopen("ni_values.py", "w");
|
FILE *fp = fopen("ni_values.py", "w");
|
||||||
|
|
||||||
|
if (fp == NULL) {
|
||||||
|
fprintf(stderr, "Could not open file!");
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
|
||||||
/* write route register values */
|
/* write route register values */
|
||||||
fprintf(fp, "ni_route_values = {\n");
|
fprintf(fp, "ni_route_values = {\n");
|
||||||
for (int i = 0; ni_all_route_values[i]; ++i)
|
for (int i = 0; ni_all_route_values[i]; ++i)
|
||||||
|
|||||||
@@ -1659,7 +1659,7 @@ bool dc_validate_boot_timing(const struct dc *dc,
|
|||||||
if (crtc_timing->pix_clk_100hz != pix_clk_100hz)
|
if (crtc_timing->pix_clk_100hz != pix_clk_100hz)
|
||||||
return false;
|
return false;
|
||||||
|
|
||||||
if (!se->funcs->dp_get_pixel_format)
|
if (!se || !se->funcs->dp_get_pixel_format)
|
||||||
return false;
|
return false;
|
||||||
|
|
||||||
if (!se->funcs->dp_get_pixel_format(
|
if (!se->funcs->dp_get_pixel_format(
|
||||||
|
|||||||
@@ -1183,6 +1183,17 @@ static void vop_crtc_disable_vblank(struct drm_crtc *crtc)
|
|||||||
spin_unlock_irqrestore(&vop->irq_lock, flags);
|
spin_unlock_irqrestore(&vop->irq_lock, flags);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static enum drm_mode_status vop_crtc_mode_valid(struct drm_crtc *crtc,
|
||||||
|
const struct drm_display_mode *mode)
|
||||||
|
{
|
||||||
|
struct vop *vop = to_vop(crtc);
|
||||||
|
|
||||||
|
if (vop->data->max_output.width && mode->hdisplay > vop->data->max_output.width)
|
||||||
|
return MODE_BAD_HVALUE;
|
||||||
|
|
||||||
|
return MODE_OK;
|
||||||
|
}
|
||||||
|
|
||||||
static bool vop_crtc_mode_fixup(struct drm_crtc *crtc,
|
static bool vop_crtc_mode_fixup(struct drm_crtc *crtc,
|
||||||
const struct drm_display_mode *mode,
|
const struct drm_display_mode *mode,
|
||||||
struct drm_display_mode *adjusted_mode)
|
struct drm_display_mode *adjusted_mode)
|
||||||
@@ -1598,6 +1609,7 @@ static void vop_crtc_atomic_flush(struct drm_crtc *crtc,
|
|||||||
}
|
}
|
||||||
|
|
||||||
static const struct drm_crtc_helper_funcs vop_crtc_helper_funcs = {
|
static const struct drm_crtc_helper_funcs vop_crtc_helper_funcs = {
|
||||||
|
.mode_valid = vop_crtc_mode_valid,
|
||||||
.mode_fixup = vop_crtc_mode_fixup,
|
.mode_fixup = vop_crtc_mode_fixup,
|
||||||
.atomic_check = vop_crtc_atomic_check,
|
.atomic_check = vop_crtc_atomic_check,
|
||||||
.atomic_begin = vop_crtc_atomic_begin,
|
.atomic_begin = vop_crtc_atomic_begin,
|
||||||
|
|||||||
@@ -42,6 +42,11 @@ enum vop_data_format {
|
|||||||
VOP_FMT_YUV444SP,
|
VOP_FMT_YUV444SP,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
struct vop_rect {
|
||||||
|
int width;
|
||||||
|
int height;
|
||||||
|
};
|
||||||
|
|
||||||
struct vop_reg {
|
struct vop_reg {
|
||||||
uint32_t mask;
|
uint32_t mask;
|
||||||
uint16_t offset;
|
uint16_t offset;
|
||||||
@@ -226,6 +231,7 @@ struct vop_data {
|
|||||||
const struct vop_win_data *win;
|
const struct vop_win_data *win;
|
||||||
unsigned int win_size;
|
unsigned int win_size;
|
||||||
unsigned int lut_size;
|
unsigned int lut_size;
|
||||||
|
struct vop_rect max_output;
|
||||||
|
|
||||||
#define VOP_FEATURE_OUTPUT_RGB10 BIT(0)
|
#define VOP_FEATURE_OUTPUT_RGB10 BIT(0)
|
||||||
#define VOP_FEATURE_INTERNAL_RGB BIT(1)
|
#define VOP_FEATURE_INTERNAL_RGB BIT(1)
|
||||||
|
|||||||
@@ -27,11 +27,6 @@ enum win_dly_mode {
|
|||||||
VOP2_DLY_MODE_MAX,
|
VOP2_DLY_MODE_MAX,
|
||||||
};
|
};
|
||||||
|
|
||||||
struct vop_rect {
|
|
||||||
int width;
|
|
||||||
int height;
|
|
||||||
};
|
|
||||||
|
|
||||||
enum vop2_scale_up_mode {
|
enum vop2_scale_up_mode {
|
||||||
VOP2_SCALE_UP_NRST_NBOR,
|
VOP2_SCALE_UP_NRST_NBOR,
|
||||||
VOP2_SCALE_UP_BIL,
|
VOP2_SCALE_UP_BIL,
|
||||||
|
|||||||
@@ -181,6 +181,7 @@ static const struct vop_data rk3036_vop = {
|
|||||||
.output = &rk3036_output,
|
.output = &rk3036_output,
|
||||||
.win = rk3036_vop_win_data,
|
.win = rk3036_vop_win_data,
|
||||||
.win_size = ARRAY_SIZE(rk3036_vop_win_data),
|
.win_size = ARRAY_SIZE(rk3036_vop_win_data),
|
||||||
|
.max_output = { 1920, 1080 },
|
||||||
};
|
};
|
||||||
|
|
||||||
static const struct vop_win_phy rk3126_win1_data = {
|
static const struct vop_win_phy rk3126_win1_data = {
|
||||||
@@ -213,6 +214,7 @@ static const struct vop_data rk3126_vop = {
|
|||||||
.output = &rk3036_output,
|
.output = &rk3036_output,
|
||||||
.win = rk3126_vop_win_data,
|
.win = rk3126_vop_win_data,
|
||||||
.win_size = ARRAY_SIZE(rk3126_vop_win_data),
|
.win_size = ARRAY_SIZE(rk3126_vop_win_data),
|
||||||
|
.max_output = { 1920, 1080 },
|
||||||
};
|
};
|
||||||
|
|
||||||
static const int px30_vop_intrs[] = {
|
static const int px30_vop_intrs[] = {
|
||||||
@@ -340,6 +342,7 @@ static const struct vop_data px30_vop_big = {
|
|||||||
.output = &px30_output,
|
.output = &px30_output,
|
||||||
.win = px30_vop_big_win_data,
|
.win = px30_vop_big_win_data,
|
||||||
.win_size = ARRAY_SIZE(px30_vop_big_win_data),
|
.win_size = ARRAY_SIZE(px30_vop_big_win_data),
|
||||||
|
.max_output = { 1920, 1080 },
|
||||||
};
|
};
|
||||||
|
|
||||||
static const struct vop_win_data px30_vop_lit_win_data[] = {
|
static const struct vop_win_data px30_vop_lit_win_data[] = {
|
||||||
@@ -356,6 +359,7 @@ static const struct vop_data px30_vop_lit = {
|
|||||||
.output = &px30_output,
|
.output = &px30_output,
|
||||||
.win = px30_vop_lit_win_data,
|
.win = px30_vop_lit_win_data,
|
||||||
.win_size = ARRAY_SIZE(px30_vop_lit_win_data),
|
.win_size = ARRAY_SIZE(px30_vop_lit_win_data),
|
||||||
|
.max_output = { 1920, 1080 },
|
||||||
};
|
};
|
||||||
|
|
||||||
static const struct vop_scl_regs rk3066_win_scl = {
|
static const struct vop_scl_regs rk3066_win_scl = {
|
||||||
@@ -480,6 +484,8 @@ static const struct vop_data rk3066_vop = {
|
|||||||
.output = &rk3066_output,
|
.output = &rk3066_output,
|
||||||
.win = rk3066_vop_win_data,
|
.win = rk3066_vop_win_data,
|
||||||
.win_size = ARRAY_SIZE(rk3066_vop_win_data),
|
.win_size = ARRAY_SIZE(rk3066_vop_win_data),
|
||||||
|
.feature = VOP_FEATURE_INTERNAL_RGB,
|
||||||
|
.max_output = { 1920, 1080 },
|
||||||
};
|
};
|
||||||
|
|
||||||
static const struct vop_scl_regs rk3188_win_scl = {
|
static const struct vop_scl_regs rk3188_win_scl = {
|
||||||
@@ -586,6 +592,7 @@ static const struct vop_data rk3188_vop = {
|
|||||||
.win = rk3188_vop_win_data,
|
.win = rk3188_vop_win_data,
|
||||||
.win_size = ARRAY_SIZE(rk3188_vop_win_data),
|
.win_size = ARRAY_SIZE(rk3188_vop_win_data),
|
||||||
.feature = VOP_FEATURE_INTERNAL_RGB,
|
.feature = VOP_FEATURE_INTERNAL_RGB,
|
||||||
|
.max_output = { 2048, 1536 },
|
||||||
};
|
};
|
||||||
|
|
||||||
static const struct vop_scl_extension rk3288_win_full_scl_ext = {
|
static const struct vop_scl_extension rk3288_win_full_scl_ext = {
|
||||||
@@ -733,6 +740,12 @@ static const struct vop_data rk3288_vop = {
|
|||||||
.win = rk3288_vop_win_data,
|
.win = rk3288_vop_win_data,
|
||||||
.win_size = ARRAY_SIZE(rk3288_vop_win_data),
|
.win_size = ARRAY_SIZE(rk3288_vop_win_data),
|
||||||
.lut_size = 1024,
|
.lut_size = 1024,
|
||||||
|
/*
|
||||||
|
* This is the maximum resolution for the VOPB, the VOPL can only do
|
||||||
|
* 2560x1600, but we can't distinguish them as they have the same
|
||||||
|
* compatible.
|
||||||
|
*/
|
||||||
|
.max_output = { 3840, 2160 },
|
||||||
};
|
};
|
||||||
|
|
||||||
static const int rk3368_vop_intrs[] = {
|
static const int rk3368_vop_intrs[] = {
|
||||||
@@ -834,6 +847,7 @@ static const struct vop_data rk3368_vop = {
|
|||||||
.misc = &rk3368_misc,
|
.misc = &rk3368_misc,
|
||||||
.win = rk3368_vop_win_data,
|
.win = rk3368_vop_win_data,
|
||||||
.win_size = ARRAY_SIZE(rk3368_vop_win_data),
|
.win_size = ARRAY_SIZE(rk3368_vop_win_data),
|
||||||
|
.max_output = { 4096, 2160 },
|
||||||
};
|
};
|
||||||
|
|
||||||
static const struct vop_intr rk3366_vop_intr = {
|
static const struct vop_intr rk3366_vop_intr = {
|
||||||
@@ -855,6 +869,7 @@ static const struct vop_data rk3366_vop = {
|
|||||||
.misc = &rk3368_misc,
|
.misc = &rk3368_misc,
|
||||||
.win = rk3368_vop_win_data,
|
.win = rk3368_vop_win_data,
|
||||||
.win_size = ARRAY_SIZE(rk3368_vop_win_data),
|
.win_size = ARRAY_SIZE(rk3368_vop_win_data),
|
||||||
|
.max_output = { 4096, 2160 },
|
||||||
};
|
};
|
||||||
|
|
||||||
static const struct vop_output rk3399_output = {
|
static const struct vop_output rk3399_output = {
|
||||||
@@ -985,6 +1000,7 @@ static const struct vop_data rk3399_vop_big = {
|
|||||||
.win_size = ARRAY_SIZE(rk3399_vop_win_data),
|
.win_size = ARRAY_SIZE(rk3399_vop_win_data),
|
||||||
.win_yuv2yuv = rk3399_vop_big_win_yuv2yuv_data,
|
.win_yuv2yuv = rk3399_vop_big_win_yuv2yuv_data,
|
||||||
.lut_size = 1024,
|
.lut_size = 1024,
|
||||||
|
.max_output = { 4096, 2160 },
|
||||||
};
|
};
|
||||||
|
|
||||||
static const struct vop_win_data rk3399_vop_lit_win_data[] = {
|
static const struct vop_win_data rk3399_vop_lit_win_data[] = {
|
||||||
@@ -1011,6 +1027,7 @@ static const struct vop_data rk3399_vop_lit = {
|
|||||||
.win_size = ARRAY_SIZE(rk3399_vop_lit_win_data),
|
.win_size = ARRAY_SIZE(rk3399_vop_lit_win_data),
|
||||||
.win_yuv2yuv = rk3399_vop_lit_win_yuv2yuv_data,
|
.win_yuv2yuv = rk3399_vop_lit_win_yuv2yuv_data,
|
||||||
.lut_size = 256,
|
.lut_size = 256,
|
||||||
|
.max_output = { 2560, 1600 },
|
||||||
};
|
};
|
||||||
|
|
||||||
static const struct vop_win_data rk3228_vop_win_data[] = {
|
static const struct vop_win_data rk3228_vop_win_data[] = {
|
||||||
@@ -1030,6 +1047,7 @@ static const struct vop_data rk3228_vop = {
|
|||||||
.misc = &rk3368_misc,
|
.misc = &rk3368_misc,
|
||||||
.win = rk3228_vop_win_data,
|
.win = rk3228_vop_win_data,
|
||||||
.win_size = ARRAY_SIZE(rk3228_vop_win_data),
|
.win_size = ARRAY_SIZE(rk3228_vop_win_data),
|
||||||
|
.max_output = { 4096, 2160 },
|
||||||
};
|
};
|
||||||
|
|
||||||
static const struct vop_modeset rk3328_modeset = {
|
static const struct vop_modeset rk3328_modeset = {
|
||||||
@@ -1101,6 +1119,7 @@ static const struct vop_data rk3328_vop = {
|
|||||||
.misc = &rk3328_misc,
|
.misc = &rk3328_misc,
|
||||||
.win = rk3328_vop_win_data,
|
.win = rk3328_vop_win_data,
|
||||||
.win_size = ARRAY_SIZE(rk3328_vop_win_data),
|
.win_size = ARRAY_SIZE(rk3328_vop_win_data),
|
||||||
|
.max_output = { 4096, 2160 },
|
||||||
};
|
};
|
||||||
|
|
||||||
static const struct of_device_id vop_driver_dt_match[] = {
|
static const struct of_device_id vop_driver_dt_match[] = {
|
||||||
|
|||||||
@@ -1751,8 +1751,15 @@ static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id)
|
|||||||
|
|
||||||
i801_add_tco(priv);
|
i801_add_tco(priv);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* adapter.name is used by platform code to find the main I801 adapter
|
||||||
|
* to instantiante i2c_clients, do not change.
|
||||||
|
*/
|
||||||
snprintf(priv->adapter.name, sizeof(priv->adapter.name),
|
snprintf(priv->adapter.name, sizeof(priv->adapter.name),
|
||||||
"SMBus I801 adapter at %04lx", priv->smba);
|
"SMBus %s adapter at %04lx",
|
||||||
|
(priv->features & FEATURE_IDF) ? "I801 IDF" : "I801",
|
||||||
|
priv->smba);
|
||||||
|
|
||||||
err = i2c_add_adapter(&priv->adapter);
|
err = i2c_add_adapter(&priv->adapter);
|
||||||
if (err) {
|
if (err) {
|
||||||
platform_device_unregister(priv->tco_pdev);
|
platform_device_unregister(priv->tco_pdev);
|
||||||
|
|||||||
@@ -2616,14 +2616,16 @@ static int retry_send(struct ib_mad_send_wr_private *mad_send_wr)
|
|||||||
|
|
||||||
static void timeout_sends(struct work_struct *work)
|
static void timeout_sends(struct work_struct *work)
|
||||||
{
|
{
|
||||||
|
struct ib_mad_send_wr_private *mad_send_wr, *n;
|
||||||
struct ib_mad_agent_private *mad_agent_priv;
|
struct ib_mad_agent_private *mad_agent_priv;
|
||||||
struct ib_mad_send_wr_private *mad_send_wr;
|
|
||||||
struct ib_mad_send_wc mad_send_wc;
|
struct ib_mad_send_wc mad_send_wc;
|
||||||
|
struct list_head local_list;
|
||||||
unsigned long flags, delay;
|
unsigned long flags, delay;
|
||||||
|
|
||||||
mad_agent_priv = container_of(work, struct ib_mad_agent_private,
|
mad_agent_priv = container_of(work, struct ib_mad_agent_private,
|
||||||
timed_work.work);
|
timed_work.work);
|
||||||
mad_send_wc.vendor_err = 0;
|
mad_send_wc.vendor_err = 0;
|
||||||
|
INIT_LIST_HEAD(&local_list);
|
||||||
|
|
||||||
spin_lock_irqsave(&mad_agent_priv->lock, flags);
|
spin_lock_irqsave(&mad_agent_priv->lock, flags);
|
||||||
while (!list_empty(&mad_agent_priv->wait_list)) {
|
while (!list_empty(&mad_agent_priv->wait_list)) {
|
||||||
@@ -2641,13 +2643,16 @@ static void timeout_sends(struct work_struct *work)
|
|||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
list_del(&mad_send_wr->agent_list);
|
list_del_init(&mad_send_wr->agent_list);
|
||||||
if (mad_send_wr->status == IB_WC_SUCCESS &&
|
if (mad_send_wr->status == IB_WC_SUCCESS &&
|
||||||
!retry_send(mad_send_wr))
|
!retry_send(mad_send_wr))
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
spin_unlock_irqrestore(&mad_agent_priv->lock, flags);
|
list_add_tail(&mad_send_wr->agent_list, &local_list);
|
||||||
|
}
|
||||||
|
spin_unlock_irqrestore(&mad_agent_priv->lock, flags);
|
||||||
|
|
||||||
|
list_for_each_entry_safe(mad_send_wr, n, &local_list, agent_list) {
|
||||||
if (mad_send_wr->status == IB_WC_SUCCESS)
|
if (mad_send_wr->status == IB_WC_SUCCESS)
|
||||||
mad_send_wc.status = IB_WC_RESP_TIMEOUT_ERR;
|
mad_send_wc.status = IB_WC_RESP_TIMEOUT_ERR;
|
||||||
else
|
else
|
||||||
@@ -2655,11 +2660,8 @@ static void timeout_sends(struct work_struct *work)
|
|||||||
mad_send_wc.send_buf = &mad_send_wr->send_buf;
|
mad_send_wc.send_buf = &mad_send_wr->send_buf;
|
||||||
mad_agent_priv->agent.send_handler(&mad_agent_priv->agent,
|
mad_agent_priv->agent.send_handler(&mad_agent_priv->agent,
|
||||||
&mad_send_wc);
|
&mad_send_wc);
|
||||||
|
|
||||||
deref_mad_agent(mad_agent_priv);
|
deref_mad_agent(mad_agent_priv);
|
||||||
spin_lock_irqsave(&mad_agent_priv->lock, flags);
|
|
||||||
}
|
}
|
||||||
spin_unlock_irqrestore(&mad_agent_priv->lock, flags);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|||||||
@@ -734,24 +734,31 @@ static int pagefault_dmabuf_mr(struct mlx5_ib_mr *mr, size_t bcnt,
|
|||||||
* >0: Number of pages mapped
|
* >0: Number of pages mapped
|
||||||
*/
|
*/
|
||||||
static int pagefault_mr(struct mlx5_ib_mr *mr, u64 io_virt, size_t bcnt,
|
static int pagefault_mr(struct mlx5_ib_mr *mr, u64 io_virt, size_t bcnt,
|
||||||
u32 *bytes_mapped, u32 flags)
|
u32 *bytes_mapped, u32 flags, bool permissive_fault)
|
||||||
{
|
{
|
||||||
struct ib_umem_odp *odp = to_ib_umem_odp(mr->umem);
|
struct ib_umem_odp *odp = to_ib_umem_odp(mr->umem);
|
||||||
|
|
||||||
if (unlikely(io_virt < mr->ibmr.iova))
|
if (unlikely(io_virt < mr->ibmr.iova) && !permissive_fault)
|
||||||
return -EFAULT;
|
return -EFAULT;
|
||||||
|
|
||||||
if (mr->umem->is_dmabuf)
|
if (mr->umem->is_dmabuf)
|
||||||
return pagefault_dmabuf_mr(mr, bcnt, bytes_mapped, flags);
|
return pagefault_dmabuf_mr(mr, bcnt, bytes_mapped, flags);
|
||||||
|
|
||||||
if (!odp->is_implicit_odp) {
|
if (!odp->is_implicit_odp) {
|
||||||
|
u64 offset = io_virt < mr->ibmr.iova ? 0 : io_virt - mr->ibmr.iova;
|
||||||
u64 user_va;
|
u64 user_va;
|
||||||
|
|
||||||
if (check_add_overflow(io_virt - mr->ibmr.iova,
|
if (check_add_overflow(offset, (u64)odp->umem.address,
|
||||||
(u64)odp->umem.address, &user_va))
|
&user_va))
|
||||||
return -EFAULT;
|
return -EFAULT;
|
||||||
if (unlikely(user_va >= ib_umem_end(odp) ||
|
|
||||||
ib_umem_end(odp) - user_va < bcnt))
|
if (permissive_fault) {
|
||||||
|
if (user_va < ib_umem_start(odp))
|
||||||
|
user_va = ib_umem_start(odp);
|
||||||
|
if ((user_va + bcnt) > ib_umem_end(odp))
|
||||||
|
bcnt = ib_umem_end(odp) - user_va;
|
||||||
|
} else if (unlikely(user_va >= ib_umem_end(odp) ||
|
||||||
|
ib_umem_end(odp) - user_va < bcnt))
|
||||||
return -EFAULT;
|
return -EFAULT;
|
||||||
return pagefault_real_mr(mr, odp, user_va, bcnt, bytes_mapped,
|
return pagefault_real_mr(mr, odp, user_va, bcnt, bytes_mapped,
|
||||||
flags);
|
flags);
|
||||||
@@ -858,7 +865,7 @@ next_mr:
|
|||||||
case MLX5_MKEY_MR:
|
case MLX5_MKEY_MR:
|
||||||
mr = container_of(mmkey, struct mlx5_ib_mr, mmkey);
|
mr = container_of(mmkey, struct mlx5_ib_mr, mmkey);
|
||||||
|
|
||||||
ret = pagefault_mr(mr, io_virt, bcnt, bytes_mapped, 0);
|
ret = pagefault_mr(mr, io_virt, bcnt, bytes_mapped, 0, false);
|
||||||
if (ret < 0)
|
if (ret < 0)
|
||||||
goto end;
|
goto end;
|
||||||
|
|
||||||
@@ -1724,7 +1731,7 @@ static void mlx5_ib_prefetch_mr_work(struct work_struct *w)
|
|||||||
for (i = 0; i < work->num_sge; ++i) {
|
for (i = 0; i < work->num_sge; ++i) {
|
||||||
ret = pagefault_mr(work->frags[i].mr, work->frags[i].io_virt,
|
ret = pagefault_mr(work->frags[i].mr, work->frags[i].io_virt,
|
||||||
work->frags[i].length, &bytes_mapped,
|
work->frags[i].length, &bytes_mapped,
|
||||||
work->pf_flags);
|
work->pf_flags, false);
|
||||||
if (ret <= 0)
|
if (ret <= 0)
|
||||||
continue;
|
continue;
|
||||||
mlx5_update_odp_stats(work->frags[i].mr, prefetch, ret);
|
mlx5_update_odp_stats(work->frags[i].mr, prefetch, ret);
|
||||||
@@ -1775,7 +1782,7 @@ static int mlx5_ib_prefetch_sg_list(struct ib_pd *pd,
|
|||||||
if (IS_ERR(mr))
|
if (IS_ERR(mr))
|
||||||
return PTR_ERR(mr);
|
return PTR_ERR(mr);
|
||||||
ret = pagefault_mr(mr, sg_list[i].addr, sg_list[i].length,
|
ret = pagefault_mr(mr, sg_list[i].addr, sg_list[i].length,
|
||||||
&bytes_mapped, pf_flags);
|
&bytes_mapped, pf_flags, false);
|
||||||
if (ret < 0) {
|
if (ret < 0) {
|
||||||
mlx5r_deref_odp_mkey(&mr->mmkey);
|
mlx5r_deref_odp_mkey(&mr->mmkey);
|
||||||
return ret;
|
return ret;
|
||||||
|
|||||||
@@ -936,12 +936,11 @@ static void rtrs_srv_info_req_done(struct ib_cq *cq, struct ib_wc *wc)
|
|||||||
if (err)
|
if (err)
|
||||||
goto close;
|
goto close;
|
||||||
|
|
||||||
out:
|
|
||||||
rtrs_iu_free(iu, srv_path->s.dev->ib_dev, 1);
|
rtrs_iu_free(iu, srv_path->s.dev->ib_dev, 1);
|
||||||
return;
|
return;
|
||||||
close:
|
close:
|
||||||
|
rtrs_iu_free(iu, srv_path->s.dev->ib_dev, 1);
|
||||||
close_path(srv_path);
|
close_path(srv_path);
|
||||||
goto out;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static int post_recv_info_req(struct rtrs_srv_con *con)
|
static int post_recv_info_req(struct rtrs_srv_con *con)
|
||||||
@@ -992,6 +991,16 @@ static int post_recv_path(struct rtrs_srv_path *srv_path)
|
|||||||
q_size = SERVICE_CON_QUEUE_DEPTH;
|
q_size = SERVICE_CON_QUEUE_DEPTH;
|
||||||
else
|
else
|
||||||
q_size = srv->queue_depth;
|
q_size = srv->queue_depth;
|
||||||
|
if (srv_path->state != RTRS_SRV_CONNECTING) {
|
||||||
|
rtrs_err(s, "Path state invalid. state %s\n",
|
||||||
|
rtrs_srv_state_str(srv_path->state));
|
||||||
|
return -EIO;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (!srv_path->s.con[cid]) {
|
||||||
|
rtrs_err(s, "Conn not set for %d\n", cid);
|
||||||
|
return -EIO;
|
||||||
|
}
|
||||||
|
|
||||||
err = post_recv_io(to_srv_con(srv_path->s.con[cid]), q_size);
|
err = post_recv_io(to_srv_con(srv_path->s.con[cid]), q_size);
|
||||||
if (err) {
|
if (err) {
|
||||||
|
|||||||
@@ -302,6 +302,10 @@ static void __vb2_plane_dmabuf_put(struct vb2_buffer *vb, struct vb2_plane *p)
|
|||||||
p->mem_priv = NULL;
|
p->mem_priv = NULL;
|
||||||
p->dbuf = NULL;
|
p->dbuf = NULL;
|
||||||
p->dbuf_mapped = 0;
|
p->dbuf_mapped = 0;
|
||||||
|
p->bytesused = 0;
|
||||||
|
p->length = 0;
|
||||||
|
p->m.fd = 0;
|
||||||
|
p->data_offset = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
@@ -1310,10 +1314,6 @@ static int __prepare_dmabuf(struct vb2_buffer *vb)
|
|||||||
|
|
||||||
/* Release previously acquired memory if present */
|
/* Release previously acquired memory if present */
|
||||||
__vb2_plane_dmabuf_put(vb, &vb->planes[plane]);
|
__vb2_plane_dmabuf_put(vb, &vb->planes[plane]);
|
||||||
vb->planes[plane].bytesused = 0;
|
|
||||||
vb->planes[plane].length = 0;
|
|
||||||
vb->planes[plane].m.fd = 0;
|
|
||||||
vb->planes[plane].data_offset = 0;
|
|
||||||
|
|
||||||
/* Acquire each plane's memory */
|
/* Acquire each plane's memory */
|
||||||
mem_priv = call_ptr_memop(attach_dmabuf,
|
mem_priv = call_ptr_memop(attach_dmabuf,
|
||||||
|
|||||||
@@ -1556,6 +1556,7 @@ static void switchtec_ntb_remove(struct device *dev,
|
|||||||
switchtec_ntb_deinit_db_msg_irq(sndev);
|
switchtec_ntb_deinit_db_msg_irq(sndev);
|
||||||
switchtec_ntb_deinit_shared_mw(sndev);
|
switchtec_ntb_deinit_shared_mw(sndev);
|
||||||
switchtec_ntb_deinit_crosslink(sndev);
|
switchtec_ntb_deinit_crosslink(sndev);
|
||||||
|
cancel_work_sync(&sndev->check_link_status_work);
|
||||||
kfree(sndev);
|
kfree(sndev);
|
||||||
dev_info(dev, "ntb device unregistered\n");
|
dev_info(dev, "ntb device unregistered\n");
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -3506,6 +3506,8 @@ DECLARE_PCI_FIXUP_FINAL(0x1814, 0x0601, /* Ralink RT2800 802.11n PCI */
|
|||||||
quirk_broken_intx_masking);
|
quirk_broken_intx_masking);
|
||||||
DECLARE_PCI_FIXUP_FINAL(0x1b7c, 0x0004, /* Ceton InfiniTV4 */
|
DECLARE_PCI_FIXUP_FINAL(0x1b7c, 0x0004, /* Ceton InfiniTV4 */
|
||||||
quirk_broken_intx_masking);
|
quirk_broken_intx_masking);
|
||||||
|
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CREATIVE, PCI_DEVICE_ID_CREATIVE_20K2,
|
||||||
|
quirk_broken_intx_masking);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Realtek RTL8169 PCI Gigabit Ethernet Controller (rev 10)
|
* Realtek RTL8169 PCI Gigabit Ethernet Controller (rev 10)
|
||||||
@@ -4144,6 +4146,10 @@ static void quirk_dma_func0_alias(struct pci_dev *dev)
|
|||||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_RICOH, 0xe832, quirk_dma_func0_alias);
|
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_RICOH, 0xe832, quirk_dma_func0_alias);
|
||||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_RICOH, 0xe476, quirk_dma_func0_alias);
|
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_RICOH, 0xe476, quirk_dma_func0_alias);
|
||||||
|
|
||||||
|
/* Some Glenfly chips use function 0 as the PCIe Requester ID for DMA */
|
||||||
|
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_GLENFLY, 0x3d40, quirk_dma_func0_alias);
|
||||||
|
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_GLENFLY, 0x3d41, quirk_dma_func0_alias);
|
||||||
|
|
||||||
static void quirk_dma_func1_alias(struct pci_dev *dev)
|
static void quirk_dma_func1_alias(struct pci_dev *dev)
|
||||||
{
|
{
|
||||||
if (PCI_FUNC(dev->devfn) != 1)
|
if (PCI_FUNC(dev->devfn) != 1)
|
||||||
@@ -4968,6 +4974,8 @@ static const struct pci_dev_acs_enabled {
|
|||||||
/* QCOM QDF2xxx root ports */
|
/* QCOM QDF2xxx root ports */
|
||||||
{ PCI_VENDOR_ID_QCOM, 0x0400, pci_quirk_qcom_rp_acs },
|
{ PCI_VENDOR_ID_QCOM, 0x0400, pci_quirk_qcom_rp_acs },
|
||||||
{ PCI_VENDOR_ID_QCOM, 0x0401, pci_quirk_qcom_rp_acs },
|
{ PCI_VENDOR_ID_QCOM, 0x0401, pci_quirk_qcom_rp_acs },
|
||||||
|
/* QCOM SA8775P root port */
|
||||||
|
{ PCI_VENDOR_ID_QCOM, 0x0115, pci_quirk_qcom_rp_acs },
|
||||||
/* HXT SD4800 root ports. The ACS design is same as QCOM QDF2xxx */
|
/* HXT SD4800 root ports. The ACS design is same as QCOM QDF2xxx */
|
||||||
{ PCI_VENDOR_ID_HXT, 0x0401, pci_quirk_qcom_rp_acs },
|
{ PCI_VENDOR_ID_HXT, 0x0401, pci_quirk_qcom_rp_acs },
|
||||||
/* Intel PCH root ports */
|
/* Intel PCH root ports */
|
||||||
|
|||||||
@@ -537,6 +537,17 @@ static struct resource_table *imx_rproc_get_loaded_rsc_table(struct rproc *rproc
|
|||||||
return (struct resource_table *)priv->rsc_table;
|
return (struct resource_table *)priv->rsc_table;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static struct resource_table *
|
||||||
|
imx_rproc_elf_find_loaded_rsc_table(struct rproc *rproc, const struct firmware *fw)
|
||||||
|
{
|
||||||
|
struct imx_rproc *priv = rproc->priv;
|
||||||
|
|
||||||
|
if (priv->rsc_table)
|
||||||
|
return (struct resource_table *)priv->rsc_table;
|
||||||
|
|
||||||
|
return rproc_elf_find_loaded_rsc_table(rproc, fw);
|
||||||
|
}
|
||||||
|
|
||||||
static const struct rproc_ops imx_rproc_ops = {
|
static const struct rproc_ops imx_rproc_ops = {
|
||||||
.prepare = imx_rproc_prepare,
|
.prepare = imx_rproc_prepare,
|
||||||
.attach = imx_rproc_attach,
|
.attach = imx_rproc_attach,
|
||||||
@@ -546,7 +557,7 @@ static const struct rproc_ops imx_rproc_ops = {
|
|||||||
.da_to_va = imx_rproc_da_to_va,
|
.da_to_va = imx_rproc_da_to_va,
|
||||||
.load = rproc_elf_load_segments,
|
.load = rproc_elf_load_segments,
|
||||||
.parse_fw = imx_rproc_parse_fw,
|
.parse_fw = imx_rproc_parse_fw,
|
||||||
.find_loaded_rsc_table = rproc_elf_find_loaded_rsc_table,
|
.find_loaded_rsc_table = imx_rproc_elf_find_loaded_rsc_table,
|
||||||
.get_loaded_rsc_table = imx_rproc_get_loaded_rsc_table,
|
.get_loaded_rsc_table = imx_rproc_get_loaded_rsc_table,
|
||||||
.sanity_check = rproc_elf_sanity_check,
|
.sanity_check = rproc_elf_sanity_check,
|
||||||
.get_boot_addr = rproc_elf_get_boot_addr,
|
.get_boot_addr = rproc_elf_get_boot_addr,
|
||||||
|
|||||||
@@ -1663,6 +1663,18 @@ lpfc_cmpl_ct(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
|
|||||||
}
|
}
|
||||||
|
|
||||||
out:
|
out:
|
||||||
|
/* If the caller wanted a synchronous DA_ID completion, signal the
|
||||||
|
* wait obj and clear flag to reset the vport.
|
||||||
|
*/
|
||||||
|
if (ndlp->save_flags & NLP_WAIT_FOR_DA_ID) {
|
||||||
|
if (ndlp->da_id_waitq)
|
||||||
|
wake_up(ndlp->da_id_waitq);
|
||||||
|
}
|
||||||
|
|
||||||
|
spin_lock_irq(&ndlp->lock);
|
||||||
|
ndlp->save_flags &= ~NLP_WAIT_FOR_DA_ID;
|
||||||
|
spin_unlock_irq(&ndlp->lock);
|
||||||
|
|
||||||
lpfc_ct_free_iocb(phba, cmdiocb);
|
lpfc_ct_free_iocb(phba, cmdiocb);
|
||||||
lpfc_nlp_put(ndlp);
|
lpfc_nlp_put(ndlp);
|
||||||
return;
|
return;
|
||||||
|
|||||||
@@ -90,6 +90,8 @@ enum lpfc_nlp_save_flags {
|
|||||||
NLP_IN_RECOV_POST_DEV_LOSS = 0x1,
|
NLP_IN_RECOV_POST_DEV_LOSS = 0x1,
|
||||||
/* wait for outstanding LOGO to cmpl */
|
/* wait for outstanding LOGO to cmpl */
|
||||||
NLP_WAIT_FOR_LOGO = 0x2,
|
NLP_WAIT_FOR_LOGO = 0x2,
|
||||||
|
/* wait for outstanding DA_ID to finish */
|
||||||
|
NLP_WAIT_FOR_DA_ID = 0x4
|
||||||
};
|
};
|
||||||
|
|
||||||
struct lpfc_nodelist {
|
struct lpfc_nodelist {
|
||||||
@@ -159,7 +161,12 @@ struct lpfc_nodelist {
|
|||||||
uint32_t nvme_fb_size; /* NVME target's supported byte cnt */
|
uint32_t nvme_fb_size; /* NVME target's supported byte cnt */
|
||||||
#define NVME_FB_BIT_SHIFT 9 /* PRLI Rsp first burst in 512B units. */
|
#define NVME_FB_BIT_SHIFT 9 /* PRLI Rsp first burst in 512B units. */
|
||||||
uint32_t nlp_defer_did;
|
uint32_t nlp_defer_did;
|
||||||
|
|
||||||
|
/* These wait objects are NPIV specific. These IOs must complete
|
||||||
|
* synchronously.
|
||||||
|
*/
|
||||||
wait_queue_head_t *logo_waitq;
|
wait_queue_head_t *logo_waitq;
|
||||||
|
wait_queue_head_t *da_id_waitq;
|
||||||
};
|
};
|
||||||
|
|
||||||
struct lpfc_node_rrq {
|
struct lpfc_node_rrq {
|
||||||
|
|||||||
@@ -9455,11 +9455,12 @@ lpfc_els_flush_cmd(struct lpfc_vport *vport)
|
|||||||
if (piocb->cmd_flag & LPFC_DRIVER_ABORTED && !mbx_tmo_err)
|
if (piocb->cmd_flag & LPFC_DRIVER_ABORTED && !mbx_tmo_err)
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
/* On the ELS ring we can have ELS_REQUESTs or
|
/* On the ELS ring we can have ELS_REQUESTs, ELS_RSPs,
|
||||||
* GEN_REQUESTs waiting for a response.
|
* or GEN_REQUESTs waiting for a CQE response.
|
||||||
*/
|
*/
|
||||||
ulp_command = get_job_cmnd(phba, piocb);
|
ulp_command = get_job_cmnd(phba, piocb);
|
||||||
if (ulp_command == CMD_ELS_REQUEST64_CR) {
|
if (ulp_command == CMD_ELS_REQUEST64_WQE ||
|
||||||
|
ulp_command == CMD_XMIT_ELS_RSP64_WQE) {
|
||||||
list_add_tail(&piocb->dlist, &abort_list);
|
list_add_tail(&piocb->dlist, &abort_list);
|
||||||
|
|
||||||
/* If the link is down when flushing ELS commands
|
/* If the link is down when flushing ELS commands
|
||||||
|
|||||||
@@ -643,6 +643,7 @@ lpfc_vport_delete(struct fc_vport *fc_vport)
|
|||||||
struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
|
struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
|
||||||
struct lpfc_hba *phba = vport->phba;
|
struct lpfc_hba *phba = vport->phba;
|
||||||
int rc;
|
int rc;
|
||||||
|
DECLARE_WAIT_QUEUE_HEAD_ONSTACK(waitq);
|
||||||
|
|
||||||
if (vport->port_type == LPFC_PHYSICAL_PORT) {
|
if (vport->port_type == LPFC_PHYSICAL_PORT) {
|
||||||
lpfc_printf_vlog(vport, KERN_ERR, LOG_TRACE_EVENT,
|
lpfc_printf_vlog(vport, KERN_ERR, LOG_TRACE_EVENT,
|
||||||
@@ -698,21 +699,49 @@ lpfc_vport_delete(struct fc_vport *fc_vport)
|
|||||||
if (!ndlp)
|
if (!ndlp)
|
||||||
goto skip_logo;
|
goto skip_logo;
|
||||||
|
|
||||||
|
/* Send the DA_ID and Fabric LOGO to cleanup the NPIV fabric entries. */
|
||||||
if (ndlp && ndlp->nlp_state == NLP_STE_UNMAPPED_NODE &&
|
if (ndlp && ndlp->nlp_state == NLP_STE_UNMAPPED_NODE &&
|
||||||
phba->link_state >= LPFC_LINK_UP &&
|
phba->link_state >= LPFC_LINK_UP &&
|
||||||
phba->fc_topology != LPFC_TOPOLOGY_LOOP) {
|
phba->fc_topology != LPFC_TOPOLOGY_LOOP) {
|
||||||
if (vport->cfg_enable_da_id) {
|
if (vport->cfg_enable_da_id) {
|
||||||
/* Send DA_ID and wait for a completion. */
|
/* Send DA_ID and wait for a completion. This is best
|
||||||
|
* effort. If the DA_ID fails, likely the fabric will
|
||||||
|
* "leak" NportIDs but at least the driver issued the
|
||||||
|
* command.
|
||||||
|
*/
|
||||||
|
ndlp = lpfc_findnode_did(vport, NameServer_DID);
|
||||||
|
if (!ndlp)
|
||||||
|
goto issue_logo;
|
||||||
|
|
||||||
|
spin_lock_irq(&ndlp->lock);
|
||||||
|
ndlp->da_id_waitq = &waitq;
|
||||||
|
ndlp->save_flags |= NLP_WAIT_FOR_DA_ID;
|
||||||
|
spin_unlock_irq(&ndlp->lock);
|
||||||
|
|
||||||
rc = lpfc_ns_cmd(vport, SLI_CTNS_DA_ID, 0, 0);
|
rc = lpfc_ns_cmd(vport, SLI_CTNS_DA_ID, 0, 0);
|
||||||
if (rc) {
|
if (!rc) {
|
||||||
lpfc_printf_log(vport->phba, KERN_WARNING,
|
wait_event_timeout(waitq,
|
||||||
LOG_VPORT,
|
!(ndlp->save_flags & NLP_WAIT_FOR_DA_ID),
|
||||||
"1829 CT command failed to "
|
msecs_to_jiffies(phba->fc_ratov * 2000));
|
||||||
"delete objects on fabric, "
|
|
||||||
"rc %d\n", rc);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
lpfc_printf_vlog(vport, KERN_INFO, LOG_VPORT | LOG_ELS,
|
||||||
|
"1829 DA_ID issue status %d. "
|
||||||
|
"SFlag x%x NState x%x, NFlag x%x "
|
||||||
|
"Rpi x%x\n",
|
||||||
|
rc, ndlp->save_flags, ndlp->nlp_state,
|
||||||
|
ndlp->nlp_flag, ndlp->nlp_rpi);
|
||||||
|
|
||||||
|
/* Remove the waitq and save_flags. It no
|
||||||
|
* longer matters if the wake happened.
|
||||||
|
*/
|
||||||
|
spin_lock_irq(&ndlp->lock);
|
||||||
|
ndlp->da_id_waitq = NULL;
|
||||||
|
ndlp->save_flags &= ~NLP_WAIT_FOR_DA_ID;
|
||||||
|
spin_unlock_irq(&ndlp->lock);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
issue_logo:
|
||||||
/*
|
/*
|
||||||
* If the vpi is not registered, then a valid FDISC doesn't
|
* If the vpi is not registered, then a valid FDISC doesn't
|
||||||
* exist and there is no need for a ELS LOGO. Just cleanup
|
* exist and there is no need for a ELS LOGO. Just cleanup
|
||||||
|
|||||||
@@ -1071,6 +1071,12 @@ static int __init fake_init(void)
|
|||||||
struct vme_slave_resource *slave_image;
|
struct vme_slave_resource *slave_image;
|
||||||
struct vme_lm_resource *lm;
|
struct vme_lm_resource *lm;
|
||||||
|
|
||||||
|
if (geoid < 0 || geoid >= VME_MAX_SLOTS) {
|
||||||
|
pr_err("VME geographical address must be between 0 and %d (exclusive), but got %d\n",
|
||||||
|
VME_MAX_SLOTS, geoid);
|
||||||
|
return -EINVAL;
|
||||||
|
}
|
||||||
|
|
||||||
/* We need a fake parent device */
|
/* We need a fake parent device */
|
||||||
vme_root = __root_device_register("vme", THIS_MODULE);
|
vme_root = __root_device_register("vme", THIS_MODULE);
|
||||||
if (IS_ERR(vme_root))
|
if (IS_ERR(vme_root))
|
||||||
|
|||||||
@@ -2261,6 +2261,12 @@ static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|||||||
struct vme_dma_resource *dma_ctrlr;
|
struct vme_dma_resource *dma_ctrlr;
|
||||||
struct vme_lm_resource *lm;
|
struct vme_lm_resource *lm;
|
||||||
|
|
||||||
|
if (geoid < 0 || geoid >= VME_MAX_SLOTS) {
|
||||||
|
dev_err(&pdev->dev, "VME geographical address must be between 0 and %d (exclusive), but got %d\n",
|
||||||
|
VME_MAX_SLOTS, geoid);
|
||||||
|
return -EINVAL;
|
||||||
|
}
|
||||||
|
|
||||||
/* If we want to support more than one of each bridge, we need to
|
/* If we want to support more than one of each bridge, we need to
|
||||||
* dynamically generate this so we get one per device
|
* dynamically generate this so we get one per device
|
||||||
*/
|
*/
|
||||||
|
|||||||
@@ -86,7 +86,7 @@ static int hw_device_state(struct ci_hdrc *ci, u32 dma)
|
|||||||
hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
|
hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
|
||||||
/* interrupt, error, port change, reset, sleep/suspend */
|
/* interrupt, error, port change, reset, sleep/suspend */
|
||||||
hw_write(ci, OP_USBINTR, ~0,
|
hw_write(ci, OP_USBINTR, ~0,
|
||||||
USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
|
USBi_UI|USBi_UEI|USBi_PCI|USBi_URI);
|
||||||
} else {
|
} else {
|
||||||
hw_write(ci, OP_USBINTR, ~0, 0);
|
hw_write(ci, OP_USBINTR, ~0, 0);
|
||||||
}
|
}
|
||||||
@@ -876,6 +876,7 @@ __releases(ci->lock)
|
|||||||
__acquires(ci->lock)
|
__acquires(ci->lock)
|
||||||
{
|
{
|
||||||
int retval;
|
int retval;
|
||||||
|
u32 intr;
|
||||||
|
|
||||||
spin_unlock(&ci->lock);
|
spin_unlock(&ci->lock);
|
||||||
if (ci->gadget.speed != USB_SPEED_UNKNOWN)
|
if (ci->gadget.speed != USB_SPEED_UNKNOWN)
|
||||||
@@ -889,6 +890,11 @@ __acquires(ci->lock)
|
|||||||
if (retval)
|
if (retval)
|
||||||
goto done;
|
goto done;
|
||||||
|
|
||||||
|
/* clear SLI */
|
||||||
|
hw_write(ci, OP_USBSTS, USBi_SLI, USBi_SLI);
|
||||||
|
intr = hw_read(ci, OP_USBINTR, ~0);
|
||||||
|
hw_write(ci, OP_USBINTR, ~0, intr | USBi_SLI);
|
||||||
|
|
||||||
ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
|
ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
|
||||||
if (ci->status == NULL)
|
if (ci->status == NULL)
|
||||||
retval = -ENOMEM;
|
retval = -ENOMEM;
|
||||||
|
|||||||
@@ -438,18 +438,6 @@ static int dwc2_driver_probe(struct platform_device *dev)
|
|||||||
|
|
||||||
spin_lock_init(&hsotg->lock);
|
spin_lock_init(&hsotg->lock);
|
||||||
|
|
||||||
hsotg->irq = platform_get_irq(dev, 0);
|
|
||||||
if (hsotg->irq < 0)
|
|
||||||
return hsotg->irq;
|
|
||||||
|
|
||||||
dev_dbg(hsotg->dev, "registering common handler for irq%d\n",
|
|
||||||
hsotg->irq);
|
|
||||||
retval = devm_request_irq(hsotg->dev, hsotg->irq,
|
|
||||||
dwc2_handle_common_intr, IRQF_SHARED,
|
|
||||||
dev_name(hsotg->dev), hsotg);
|
|
||||||
if (retval)
|
|
||||||
return retval;
|
|
||||||
|
|
||||||
hsotg->vbus_supply = devm_regulator_get_optional(hsotg->dev, "vbus");
|
hsotg->vbus_supply = devm_regulator_get_optional(hsotg->dev, "vbus");
|
||||||
if (IS_ERR(hsotg->vbus_supply)) {
|
if (IS_ERR(hsotg->vbus_supply)) {
|
||||||
retval = PTR_ERR(hsotg->vbus_supply);
|
retval = PTR_ERR(hsotg->vbus_supply);
|
||||||
@@ -493,6 +481,20 @@ static int dwc2_driver_probe(struct platform_device *dev)
|
|||||||
if (retval)
|
if (retval)
|
||||||
goto error;
|
goto error;
|
||||||
|
|
||||||
|
hsotg->irq = platform_get_irq(dev, 0);
|
||||||
|
if (hsotg->irq < 0) {
|
||||||
|
retval = hsotg->irq;
|
||||||
|
goto error;
|
||||||
|
}
|
||||||
|
|
||||||
|
dev_dbg(hsotg->dev, "registering common handler for irq%d\n",
|
||||||
|
hsotg->irq);
|
||||||
|
retval = devm_request_irq(hsotg->dev, hsotg->irq,
|
||||||
|
dwc2_handle_common_intr, IRQF_SHARED,
|
||||||
|
dev_name(hsotg->dev), hsotg);
|
||||||
|
if (retval)
|
||||||
|
goto error;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* For OTG cores, set the force mode bits to reflect the value
|
* For OTG cores, set the force mode bits to reflect the value
|
||||||
* of dr_mode. Force mode bits should not be touched at any
|
* of dr_mode. Force mode bits should not be touched at any
|
||||||
|
|||||||
@@ -847,6 +847,8 @@ static int set_con2fb_map(int unit, int newidx, int user)
|
|||||||
return err;
|
return err;
|
||||||
|
|
||||||
fbcon_add_cursor_work(info);
|
fbcon_add_cursor_work(info);
|
||||||
|
} else if (vc) {
|
||||||
|
set_blitting_type(vc, info);
|
||||||
}
|
}
|
||||||
|
|
||||||
con2fb_map[unit] = newidx;
|
con2fb_map[unit] = newidx;
|
||||||
|
|||||||
@@ -184,7 +184,7 @@ static void sisfb_search_mode(char *name, bool quiet)
|
|||||||
{
|
{
|
||||||
unsigned int j = 0, xres = 0, yres = 0, depth = 0, rate = 0;
|
unsigned int j = 0, xres = 0, yres = 0, depth = 0, rate = 0;
|
||||||
int i = 0;
|
int i = 0;
|
||||||
char strbuf[16], strbuf1[20];
|
char strbuf[24], strbuf1[20];
|
||||||
char *nameptr = name;
|
char *nameptr = name;
|
||||||
|
|
||||||
/* We don't know the hardware specs yet and there is no ivideo */
|
/* We don't know the hardware specs yet and there is no ivideo */
|
||||||
|
|||||||
@@ -2638,6 +2638,8 @@
|
|||||||
#define PCI_DEVICE_ID_DCI_PCCOM8 0x0002
|
#define PCI_DEVICE_ID_DCI_PCCOM8 0x0002
|
||||||
#define PCI_DEVICE_ID_DCI_PCCOM2 0x0004
|
#define PCI_DEVICE_ID_DCI_PCCOM2 0x0004
|
||||||
|
|
||||||
|
#define PCI_VENDOR_ID_GLENFLY 0x6766
|
||||||
|
|
||||||
#define PCI_VENDOR_ID_INTEL 0x8086
|
#define PCI_VENDOR_ID_INTEL 0x8086
|
||||||
#define PCI_DEVICE_ID_INTEL_EESSC 0x0008
|
#define PCI_DEVICE_ID_INTEL_EESSC 0x0008
|
||||||
#define PCI_DEVICE_ID_INTEL_PXHD_0 0x0320
|
#define PCI_DEVICE_ID_INTEL_PXHD_0 0x0320
|
||||||
|
|||||||
@@ -615,6 +615,21 @@ static bool __io_cqring_overflow_flush(struct io_ring_ctx *ctx, bool force)
|
|||||||
|
|
||||||
list_del(&ocqe->list);
|
list_del(&ocqe->list);
|
||||||
kfree(ocqe);
|
kfree(ocqe);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* For silly syzbot cases that deliberately overflow by huge
|
||||||
|
* amounts, check if we need to resched and drop and
|
||||||
|
* reacquire the locks if so. Nothing real would ever hit this.
|
||||||
|
* Ideally we'd have a non-posting unlock for this, but hard
|
||||||
|
* to care for a non-real case.
|
||||||
|
*/
|
||||||
|
if (need_resched()) {
|
||||||
|
io_cq_unlock_post(ctx);
|
||||||
|
mutex_unlock(&ctx->uring_lock);
|
||||||
|
cond_resched();
|
||||||
|
mutex_lock(&ctx->uring_lock);
|
||||||
|
io_cq_lock(ctx);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
all_flushed = list_empty(&ctx->cq_overflow_list);
|
all_flushed = list_empty(&ctx->cq_overflow_list);
|
||||||
|
|||||||
@@ -239,9 +239,8 @@ static int nf_reject_fill_skb_dst(struct sk_buff *skb_in)
|
|||||||
void nf_send_reset(struct net *net, struct sock *sk, struct sk_buff *oldskb,
|
void nf_send_reset(struct net *net, struct sock *sk, struct sk_buff *oldskb,
|
||||||
int hook)
|
int hook)
|
||||||
{
|
{
|
||||||
struct sk_buff *nskb;
|
|
||||||
struct iphdr *niph;
|
|
||||||
const struct tcphdr *oth;
|
const struct tcphdr *oth;
|
||||||
|
struct sk_buff *nskb;
|
||||||
struct tcphdr _oth;
|
struct tcphdr _oth;
|
||||||
|
|
||||||
oth = nf_reject_ip_tcphdr_get(oldskb, &_oth, hook);
|
oth = nf_reject_ip_tcphdr_get(oldskb, &_oth, hook);
|
||||||
@@ -266,14 +265,12 @@ void nf_send_reset(struct net *net, struct sock *sk, struct sk_buff *oldskb,
|
|||||||
nskb->mark = IP4_REPLY_MARK(net, oldskb->mark);
|
nskb->mark = IP4_REPLY_MARK(net, oldskb->mark);
|
||||||
|
|
||||||
skb_reserve(nskb, LL_MAX_HEADER);
|
skb_reserve(nskb, LL_MAX_HEADER);
|
||||||
niph = nf_reject_iphdr_put(nskb, oldskb, IPPROTO_TCP,
|
nf_reject_iphdr_put(nskb, oldskb, IPPROTO_TCP,
|
||||||
ip4_dst_hoplimit(skb_dst(nskb)));
|
ip4_dst_hoplimit(skb_dst(nskb)));
|
||||||
nf_reject_ip_tcphdr_put(nskb, oldskb, oth);
|
nf_reject_ip_tcphdr_put(nskb, oldskb, oth);
|
||||||
if (ip_route_me_harder(net, sk, nskb, RTN_UNSPEC))
|
if (ip_route_me_harder(net, sk, nskb, RTN_UNSPEC))
|
||||||
goto free_nskb;
|
goto free_nskb;
|
||||||
|
|
||||||
niph = ip_hdr(nskb);
|
|
||||||
|
|
||||||
/* "Never happens" */
|
/* "Never happens" */
|
||||||
if (nskb->len > dst_mtu(skb_dst(nskb)))
|
if (nskb->len > dst_mtu(skb_dst(nskb)))
|
||||||
goto free_nskb;
|
goto free_nskb;
|
||||||
@@ -290,6 +287,7 @@ void nf_send_reset(struct net *net, struct sock *sk, struct sk_buff *oldskb,
|
|||||||
*/
|
*/
|
||||||
if (nf_bridge_info_exists(oldskb)) {
|
if (nf_bridge_info_exists(oldskb)) {
|
||||||
struct ethhdr *oeth = eth_hdr(oldskb);
|
struct ethhdr *oeth = eth_hdr(oldskb);
|
||||||
|
struct iphdr *niph = ip_hdr(nskb);
|
||||||
struct net_device *br_indev;
|
struct net_device *br_indev;
|
||||||
|
|
||||||
br_indev = nf_bridge_get_physindev(oldskb, net);
|
br_indev = nf_bridge_get_physindev(oldskb, net);
|
||||||
|
|||||||
@@ -273,7 +273,6 @@ void nf_send_reset6(struct net *net, struct sock *sk, struct sk_buff *oldskb,
|
|||||||
const struct tcphdr *otcph;
|
const struct tcphdr *otcph;
|
||||||
unsigned int otcplen, hh_len;
|
unsigned int otcplen, hh_len;
|
||||||
const struct ipv6hdr *oip6h = ipv6_hdr(oldskb);
|
const struct ipv6hdr *oip6h = ipv6_hdr(oldskb);
|
||||||
struct ipv6hdr *ip6h;
|
|
||||||
struct dst_entry *dst = NULL;
|
struct dst_entry *dst = NULL;
|
||||||
struct flowi6 fl6;
|
struct flowi6 fl6;
|
||||||
|
|
||||||
@@ -329,8 +328,7 @@ void nf_send_reset6(struct net *net, struct sock *sk, struct sk_buff *oldskb,
|
|||||||
nskb->mark = fl6.flowi6_mark;
|
nskb->mark = fl6.flowi6_mark;
|
||||||
|
|
||||||
skb_reserve(nskb, hh_len + dst->header_len);
|
skb_reserve(nskb, hh_len + dst->header_len);
|
||||||
ip6h = nf_reject_ip6hdr_put(nskb, oldskb, IPPROTO_TCP,
|
nf_reject_ip6hdr_put(nskb, oldskb, IPPROTO_TCP, ip6_dst_hoplimit(dst));
|
||||||
ip6_dst_hoplimit(dst));
|
|
||||||
nf_reject_ip6_tcphdr_put(nskb, oldskb, otcph, otcplen);
|
nf_reject_ip6_tcphdr_put(nskb, oldskb, otcph, otcplen);
|
||||||
|
|
||||||
nf_ct_attach(nskb, oldskb);
|
nf_ct_attach(nskb, oldskb);
|
||||||
@@ -345,6 +343,7 @@ void nf_send_reset6(struct net *net, struct sock *sk, struct sk_buff *oldskb,
|
|||||||
*/
|
*/
|
||||||
if (nf_bridge_info_exists(oldskb)) {
|
if (nf_bridge_info_exists(oldskb)) {
|
||||||
struct ethhdr *oeth = eth_hdr(oldskb);
|
struct ethhdr *oeth = eth_hdr(oldskb);
|
||||||
|
struct ipv6hdr *ip6h = ipv6_hdr(nskb);
|
||||||
struct net_device *br_indev;
|
struct net_device *br_indev;
|
||||||
|
|
||||||
br_indev = nf_bridge_get_physindev(oldskb, net);
|
br_indev = nf_bridge_get_physindev(oldskb, net);
|
||||||
|
|||||||
@@ -2748,7 +2748,7 @@ static const struct pci_device_id azx_ids[] = {
|
|||||||
.driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
|
.driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
|
||||||
AZX_DCAPS_PM_RUNTIME },
|
AZX_DCAPS_PM_RUNTIME },
|
||||||
/* GLENFLY */
|
/* GLENFLY */
|
||||||
{ PCI_DEVICE(0x6766, PCI_ANY_ID),
|
{ PCI_DEVICE(PCI_VENDOR_ID_GLENFLY, PCI_ANY_ID),
|
||||||
.class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
|
.class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
|
||||||
.class_mask = 0xffffff,
|
.class_mask = 0xffffff,
|
||||||
.driver_data = AZX_DRIVER_GFHDMI | AZX_DCAPS_POSFIX_LPIB |
|
.driver_data = AZX_DRIVER_GFHDMI | AZX_DCAPS_POSFIX_LPIB |
|
||||||
|
|||||||
@@ -498,6 +498,10 @@ int main(int argc, char **argv)
|
|||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
}
|
}
|
||||||
trigger_name = malloc(IIO_MAX_NAME_LENGTH);
|
trigger_name = malloc(IIO_MAX_NAME_LENGTH);
|
||||||
|
if (!trigger_name) {
|
||||||
|
ret = -ENOMEM;
|
||||||
|
goto error;
|
||||||
|
}
|
||||||
ret = read_sysfs_string("name", trig_dev_name, trigger_name);
|
ret = read_sysfs_string("name", trig_dev_name, trigger_name);
|
||||||
free(trig_dev_name);
|
free(trig_dev_name);
|
||||||
if (ret < 0) {
|
if (ret < 0) {
|
||||||
|
|||||||
@@ -2036,7 +2036,7 @@ sub get_grub_index {
|
|||||||
} elsif ($reboot_type eq "grub2") {
|
} elsif ($reboot_type eq "grub2") {
|
||||||
$command = "cat $grub_file";
|
$command = "cat $grub_file";
|
||||||
$target = '^\s*menuentry.*' . $grub_menu_qt;
|
$target = '^\s*menuentry.*' . $grub_menu_qt;
|
||||||
$skip = '^\s*menuentry';
|
$skip = '^\s*menuentry\s';
|
||||||
$submenu = '^\s*submenu\s';
|
$submenu = '^\s*submenu\s';
|
||||||
} elsif ($reboot_type eq "grub2bls") {
|
} elsif ($reboot_type eq "grub2bls") {
|
||||||
$command = $grub_bls_get;
|
$command = $grub_bls_get;
|
||||||
|
|||||||
Reference in New Issue
Block a user