From 4eab18d6199fa91d7208d829e8b492d4c905070f Mon Sep 17 00:00:00 2001 From: Wyon Bi Date: Sat, 29 Dec 2018 16:10:39 +0800 Subject: [PATCH] dt-bindings: phy: Document INNOSILICON MIPI/LVDS/TTL Video Combo PHY bindings Change-Id: Ib9a2f3a4a5fe82b47ad3d85be1b553ad56b13641 Signed-off-by: Wyon Bi --- .../phy/phy-rockchip-inno-video-combo-phy.txt | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/phy-rockchip-inno-video-combo-phy.txt diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-video-combo-phy.txt b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-video-combo-phy.txt new file mode 100644 index 000000000000..af9b72f8a02f --- /dev/null +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-video-combo-phy.txt @@ -0,0 +1,34 @@ +ROCKCHIP MIPI/LVDS/TTL VIDEO COMBO PHY WITH INNO IP BLOCK + +Required properties: + - compatible : must be one of: + "rockchip,px30-video-phy", + "rockchip,rk3128-video-phy", + "rockchip,rk3368-video-phy"; + - reg : the address offset of register for phy and host configuration. + - #phy-cells : must be 0. See ./phy-bindings.txt for details. + - clocks: must include clock specifiers corresponding to entries in the + clock-names property. See ../clocks/clock-bindings.txt for details. + - clock-names: list of clock names sorted in the same order as the clocks + property. Must contain "ref", "pclk_phy", "pclk_host". + - #clock-cells : from common clock binding; shall be set to 0. + - resets : phandle to the reset of phy apb clock. + - reset-names : should be "rst". + - power-domains: Must contain a reference to the PM domain, if available. + +Example: + + video_phy: video-phy@ff2e0000 { + compatible = "rockchip,px30-video-phy"; + reg = <0x0 0xff2e0000 0x0 0x10000>, + <0x0 0xff450000 0x0 0x10000>; + clocks = <&pmucru SCLK_MIPIDSIPHY_REF>, + <&cru PCLK_MIPIDSIPHY>, <&cru PCLK_MIPI_DSI>; + clock-names = "ref", "pclk_phy", "pclk_host"; + #clock-cells = <0>; + resets = <&cru SRST_MIPIDSIPHY_P>; + reset-names = "rst"; + power-domains = <&power PX30_PD_VO>; + #phy-cells = <0>; + status = "disabled"; + };