From 4ebc216df25ec673fb5eefd1d4f42487c4c2c06c Mon Sep 17 00:00:00 2001
From: David Wu <david.wu@rock-chips.com>
Date: Fri, 19 Oct 2018 09:32:33 +0800
Subject: [PATCH] arm64: dts: rockchip: I2C0 can use 400K frequency for
 rk1808-evb

The scl rise time of I2C0 is 200ns, so it can use 400K frequency.

Change-Id: I80933698ff7576b9406213aa50becc7736951a8d
Signed-off-by: David Wu <david.wu@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk1808-evb.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk1808-evb.dtsi b/arch/arm64/boot/dts/rockchip/rk1808-evb.dtsi
index f2c7fb0e7b70..dce281ef4e02 100644
--- a/arch/arm64/boot/dts/rockchip/rk1808-evb.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk1808-evb.dtsi
@@ -252,6 +252,7 @@
 
 &i2c0 {
 	status = "okay";
+	clock-frequency = <400000>;
 
 	vdd_npu: syr837@40 {
 		compatible = "silergy,syr827";