From 4ed3b978b05952c8ec4f760fee6bec215ed376d4 Mon Sep 17 00:00:00 2001
From: shengfei Xu <xsf@rock-chips.com>
Date: Thu, 29 Oct 2020 09:54:33 +0800
Subject: [PATCH] arm64: dts: rockchip: rk3568: bring up secondary CPUs

Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: Ibace3899afc0381ad147e9ba7e0e342c112afb8e
---
 arch/arm64/boot/dts/rockchip/rk3568.dtsi | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
index 7019aa3e8962..4aabf61e55d9 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
@@ -52,7 +52,7 @@
 			reg = <0x0 0x0>;
 			enable-method = "psci";
 		};
-#if 0
+
 		cpu1: cpu@100 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a55";
@@ -73,10 +73,8 @@
 			reg = <0x0 0x300>;
 			enable-method = "psci";
 		};
-#endif
 	};
 
-#if 0
 	arm-pmu {
 		compatible = "arm,cortex-a55-pmu", "arm,armv8-pmuv3";
 		interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>,
@@ -85,7 +83,6 @@
 			     <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
 	};
-#endif
 
 	mpp_srv: mpp-srv {
 		compatible = "rockchip,mpp-service";