diff --git a/arch/arm64/boot/dts/rockchip/rk3588.dtsi b/arch/arm64/boot/dts/rockchip/rk3588.dtsi
index 9d5ead9396d7..0f78f6e6a20e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588.dtsi
@@ -168,34 +168,6 @@
 		reg = <0x0 0xfd5e4000 0x0 0x100>;
 	};
 
-	mipi4_csi2: mipi4-csi2@fdd50000 {
-		compatible = "rockchip,rk3588-mipi-csi2";
-		reg = <0x0 0xfdd50000 0x0 0x10000>;
-		reg-names = "csihost_regs";
-		interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
-		interrupt-names = "csi-intr1", "csi-intr2";
-		clocks = <&cru PCLK_CSI_HOST_4>;
-		clock-names = "pclk_csi2host";
-		resets = <&cru SRST_P_CSI_HOST_4>;
-		reset-names = "srst_csihost_p";
-		status = "disabled";
-	};
-
-	mipi5_csi2: mipi5-csi2@fdd60000 {
-		compatible = "rockchip,rk3588-mipi-csi2";
-		reg = <0x0 0xfdd60000 0x0 0x10000>;
-		reg-names = "csihost_regs";
-		interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
-		interrupt-names = "csi-intr1", "csi-intr2";
-		clocks = <&cru PCLK_CSI_HOST_5>;
-		clock-names = "pclk_csi2host";
-		resets = <&cru SRST_P_CSI_HOST_5>;
-		reset-names = "srst_csihost_p";
-		status = "disabled";
-	};
-
 	spdif_tx5: spdif-tx@fddb8000 {
 		compatible = "rockchip,rk3588-spdif", "rockchip,rk3568-spdif";
 		reg = <0x0 0xfddb8000 0x0 0x1000>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
index 48b777886bd8..dcd429389151 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -1896,6 +1896,54 @@
 	mipi_dcphy1: mipi_dcphy0: mipi-dcphy-dummy {
 	};
 
+	mipi0_csi2: mipi0-csi2 {
+		compatible = "rockchip,rk3588-mipi-csi2";
+		rockchip,hw = <&mipi0_csi2_hw>, <&mipi1_csi2_hw>,
+			      <&mipi2_csi2_hw>, <&mipi3_csi2_hw>,
+			      <&mipi4_csi2_hw>, <&mipi5_csi2_hw>;
+		status = "disabled";
+	};
+
+	mipi1_csi2: mipi1-csi2 {
+		compatible = "rockchip,rk3588-mipi-csi2";
+		rockchip,hw = <&mipi0_csi2_hw>, <&mipi1_csi2_hw>,
+			      <&mipi2_csi2_hw>, <&mipi3_csi2_hw>,
+			      <&mipi4_csi2_hw>, <&mipi5_csi2_hw>;
+		status = "disabled";
+	};
+
+	mipi2_csi2: mipi2-csi2 {
+		compatible = "rockchip,rk3588-mipi-csi2";
+		rockchip,hw = <&mipi0_csi2_hw>, <&mipi1_csi2_hw>,
+			      <&mipi2_csi2_hw>, <&mipi3_csi2_hw>,
+			      <&mipi4_csi2_hw>, <&mipi5_csi2_hw>;
+		status = "disabled";
+	};
+
+	mipi3_csi2: mipi3-csi2 {
+		compatible = "rockchip,rk3588-mipi-csi2";
+		rockchip,hw = <&mipi0_csi2_hw>, <&mipi1_csi2_hw>,
+			      <&mipi2_csi2_hw>, <&mipi3_csi2_hw>,
+			      <&mipi4_csi2_hw>, <&mipi5_csi2_hw>;
+		status = "disabled";
+	};
+
+	mipi4_csi2: mipi4-csi2 {
+		compatible = "rockchip,rk3588-mipi-csi2";
+		rockchip,hw = <&mipi0_csi2_hw>, <&mipi1_csi2_hw>,
+			      <&mipi2_csi2_hw>, <&mipi3_csi2_hw>,
+			      <&mipi4_csi2_hw>, <&mipi5_csi2_hw>;
+		status = "disabled";
+	};
+
+	mipi5_csi2: mipi5-csi2 {
+		compatible = "rockchip,rk3588-mipi-csi2";
+		rockchip,hw = <&mipi0_csi2_hw>, <&mipi1_csi2_hw>,
+			      <&mipi2_csi2_hw>, <&mipi3_csi2_hw>,
+			      <&mipi4_csi2_hw>, <&mipi5_csi2_hw>;
+		status = "disabled";
+	};
+
 	mpp_srv: mpp-srv {
 		compatible = "rockchip,mpp-service";
 		rockchip,taskqueue-count = <12>;
@@ -4414,8 +4462,8 @@
 		status = "disabled";
 	};
 
-	mipi0_csi2: mipi0-csi2@fdd10000 {
-		compatible = "rockchip,rk3588-mipi-csi2";
+	mipi0_csi2_hw: mipi0-csi2-hw@fdd10000 {
+		compatible = "rockchip,rk3588-mipi-csi2-hw";
 		reg = <0x0 0xfdd10000 0x0 0x10000>;
 		reg-names = "csihost_regs";
 		interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
@@ -4425,11 +4473,11 @@
 		clock-names = "pclk_csi2host";
 		resets = <&cru SRST_P_CSI_HOST_0>;
 		reset-names = "srst_csihost_p";
-		status = "disabled";
+		status = "okay";
 	};
 
-	mipi1_csi2: mipi1-csi2@fdd20000 {
-		compatible = "rockchip,rk3588-mipi-csi2";
+	mipi1_csi2_hw: mipi1-csi2-hw@fdd20000 {
+		compatible = "rockchip,rk3588-mipi-csi2-hw";
 		reg = <0x0 0xfdd20000 0x0 0x10000>;
 		reg-names = "csihost_regs";
 		interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
@@ -4438,12 +4486,12 @@
 		clocks = <&cru PCLK_CSI_HOST_1>;
 		clock-names = "pclk_csi2host";
 		resets = <&cru SRST_P_CSI_HOST_1>;
-		reset-names = "srst_csihost_p", "srst_csihost_vicap";
-		status = "disabled";
+		reset-names = "srst_csihost_p";
+		status = "okay";
 	};
 
-	mipi2_csi2: mipi2-csi2@fdd30000 {
-		compatible = "rockchip,rk3588-mipi-csi2";
+	mipi2_csi2_hw: mipi2-csi2-hw@fdd30000 {
+		compatible = "rockchip,rk3588-mipi-csi2-hw";
 		reg = <0x0 0xfdd30000 0x0 0x10000>;
 		reg-names = "csihost_regs";
 		interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
@@ -4453,11 +4501,11 @@
 		clock-names = "pclk_csi2host";
 		resets = <&cru SRST_P_CSI_HOST_2>;
 		reset-names = "srst_csihost_p";
-		status = "disabled";
+		status = "okay";
 	};
 
-	mipi3_csi2: mipi3-csi2@fdd40000 {
-		compatible = "rockchip,rk3588-mipi-csi2";
+	mipi3_csi2_hw: mipi3-csi2-hw@fdd40000 {
+		compatible = "rockchip,rk3588-mipi-csi2-hw";
 		reg = <0x0 0xfdd40000 0x0 0x10000>;
 		reg-names = "csihost_regs";
 		interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
@@ -4467,7 +4515,35 @@
 		clock-names = "pclk_csi2host";
 		resets = <&cru SRST_P_CSI_HOST_3>;
 		reset-names = "srst_csihost_p";
-		status = "disabled";
+		status = "okay";
+	};
+
+	mipi4_csi2_hw: mipi4-csi2-hw@fdd50000 {
+		compatible = "rockchip,rk3588-mipi-csi2-hw";
+		reg = <0x0 0xfdd50000 0x0 0x10000>;
+		reg-names = "csihost_regs";
+		interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "csi-intr1", "csi-intr2";
+		clocks = <&cru PCLK_CSI_HOST_4>;
+		clock-names = "pclk_csi2host";
+		resets = <&cru SRST_P_CSI_HOST_4>;
+		reset-names = "srst_csihost_p";
+		status = "okay";
+	};
+
+	mipi5_csi2_hw: mipi5-csi2-hw@fdd60000 {
+		compatible = "rockchip,rk3588-mipi-csi2-hw";
+		reg = <0x0 0xfdd60000 0x0 0x10000>;
+		reg-names = "csihost_regs";
+		interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "csi-intr1", "csi-intr2";
+		clocks = <&cru PCLK_CSI_HOST_5>;
+		clock-names = "pclk_csi2host";
+		resets = <&cru SRST_P_CSI_HOST_5>;
+		reset-names = "srst_csihost_p";
+		status = "okay";
 	};
 
 	vop: vop@fdd90000 {