ARM: dts: aspeed: asrock: Correct firmware flash SPI clocks

[ Upstream commit 9dedb72444 ]

While I'm not aware of any problems that have occurred running these
at 100 MHz, the official word from ASRock is that 50 MHz is the
correct speed to use, so let's be safe and use that instead.

Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Cc: stable@vger.kernel.org
Fixes: 2b81613ce4 ("ARM: dts: aspeed: Add ASRock E3C246D4I BMC")
Fixes: a9a3d60b93 ("ARM: dts: aspeed: Add ASRock ROMED8HM3 BMC")
Link: https://lore.kernel.org/r/20230224000400.12226-4-zev@bewilderbeest.net
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Zev Weiss
2023-02-23 16:04:00 -08:00
committed by Greg Kroah-Hartman
parent f84c2ca349
commit 4f1beb75f6

View File

@@ -63,7 +63,7 @@
status = "okay";
m25p,fast-read;
label = "bmc";
spi-max-frequency = <100000000>; /* 100 MHz */
spi-max-frequency = <50000000>; /* 50 MHz */
#include "openbmc-flash-layout.dtsi"
};
};