diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
index cc384cea8076..9ed69e379cb6 100644
--- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
@@ -396,8 +396,10 @@
 		opp-shared;
 		rockchip,opp-shared-cci;
 
-		nvmem-cells = <&cpul_leakage>, <&cpul_opp_info>, <&specification_serial_number>;
-		nvmem-cell-names = "leakage", "opp-info", "specification_serial_number";
+		nvmem-cells = <&cpul_leakage>, <&cpul_opp_info>,
+			      <&specification_serial_number>, <&test_version>;
+		nvmem-cell-names = "leakage", "opp-info",
+				   "specification_serial_number", "test_version";
 		rockchip,supported-hw;
 
 		rockchip,pvtm-hw = <0x06>;
@@ -660,8 +662,10 @@
 		opp-shared;
 		rockchip,cpu-freq-percent = <90>;
 
-		nvmem-cells = <&cpub_leakage>, <&cpub_opp_info>, <&specification_serial_number>;
-		nvmem-cell-names = "leakage", "opp-info", "specification_serial_number";
+		nvmem-cells = <&cpub_leakage>, <&cpub_opp_info>,
+			      <&specification_serial_number>, <&test_version>;
+		nvmem-cell-names = "leakage", "opp-info",
+				   "specification_serial_number", "test_version";
 		rockchip,supported-hw;
 
 		rockchip,pvtm-hw = <0x06>;
@@ -2444,8 +2448,10 @@
 	npu_opp_table: npu-opp-table {
 		compatible = "operating-points-v2";
 
-		nvmem-cells = <&npu_leakage>, <&npu_opp_info>, <&specification_serial_number>;
-		nvmem-cell-names = "leakage", "opp-info", "specification_serial_number";
+		nvmem-cells = <&npu_leakage>, <&npu_opp_info>,
+			      <&specification_serial_number>, <&test_version>;
+		nvmem-cell-names = "leakage", "opp-info",
+				   "specification_serial_number", "test_version";
 		rockchip,supported-hw;
 
 		rockchip,pvtm-hw = <0x06>;
@@ -2690,8 +2696,10 @@
 	gpu_opp_table: gpu-opp-table {
 		compatible = "operating-points-v2";
 
-		nvmem-cells = <&gpu_leakage>, <&gpu_opp_info>, <&specification_serial_number>;
-		nvmem-cell-names = "leakage", "opp-info", "specification_serial_number";
+		nvmem-cells = <&gpu_leakage>, <&gpu_opp_info>,
+			      <&specification_serial_number>, <&test_version>;
+		nvmem-cell-names = "leakage", "opp-info",
+				   "specification_serial_number", "test_version";
 		rockchip,supported-hw;
 
 		rockchip,pvtm-hw = <0x06>;
@@ -4981,6 +4989,10 @@
 			reg = <0x05 0x1>;
 			bits = <3 3>;
 		};
+		test_version: test-version@7 {
+			reg = <0x7 0x1>;
+			bits = <0 4>;
+		};
 		specification_serial_number: specification-serial-number@8 {
 			reg = <0x08 0x1>;
 			bits = <0 5>;