From 4fb2138533e331cd5a7190f693b5ebd4431ce688 Mon Sep 17 00:00:00 2001 From: Zhang Yubing Date: Fri, 31 Mar 2023 19:49:17 +0800 Subject: [PATCH] drm/rockchip: vop3: fix rk3528 csc mode register config Signed-off-by: Zhang Yubing Change-Id: Ifca0405a705e333ed98ee8b0b5925857fcb63102 --- drivers/gpu/drm/rockchip/rockchip_vop2_reg.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c index fadb52c659c1..8e835112b389 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c @@ -831,7 +831,7 @@ static const struct vop2_video_port_regs rk3528_vop_vp0_regs = { .acm_bypass_en = VOP_REG(RK3528_VP0_ACM_CTRL, 0x1, 0), .csc_en = VOP_REG(RK3528_VP0_ACM_CTRL, 0x1, 1), .acm_r2y_en = VOP_REG(RK3528_VP0_ACM_CTRL, 0x1, 2), - .csc_mode = VOP_REG(RK3528_VP0_ACM_CTRL, 0x1, 3), + .csc_mode = VOP_REG(RK3528_VP0_ACM_CTRL, 0x7, 3), .acm_r2y_mode = VOP_REG(RK3528_VP0_ACM_CTRL, 0x7, 8), .csc_coe00 = VOP_REG(RK3528_VP0_ACM_CTRL, 0xffff, 16), .csc_coe01 = VOP_REG(RK3528_VP0_CSC_COE01_02, 0xffff, 0),