From 502a99bcbfe45ad1201052bf63705f06d8f8799f Mon Sep 17 00:00:00 2001 From: David Wu Date: Mon, 30 Mar 2020 17:40:13 +0800 Subject: [PATCH] ARM: dts: rv11xx-evb-v10: Add 25M out for phy_clk and 125M out for tx_clk mode Change-Id: Ia78847a30bab74278eaa47f34ed4ce6dd13e4433 Signed-off-by: David Wu --- arch/arm/boot/dts/rv11xx-evb-v10.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/rv11xx-evb-v10.dtsi b/arch/arm/boot/dts/rv11xx-evb-v10.dtsi index e01600de3a20..02b4c39ee37d 100644 --- a/arch/arm/boot/dts/rv11xx-evb-v10.dtsi +++ b/arch/arm/boot/dts/rv11xx-evb-v10.dtsi @@ -480,9 +480,9 @@ /* Reset time is 20ms, 100ms for rtl8211f */ snps,reset-delays-us = <0 20000 100000>; - assigned-clocks = <&cru CLK_GMAC_SRC>, <&cru CLK_GMAC_ETHERNET_OUT>; - assigned-clock-parents = <&cru CLK_GMAC_SRC_M1>; - assigned-clock-rates = <125000000>, <25000000>; + assigned-clocks = <&cru CLK_GMAC_SRC>, <&cru CLK_GMAC_TX_RX>, <&cru CLK_GMAC_ETHERNET_OUT>; + assigned-clock-parents = <&cru CLK_GMAC_SRC_M1>, <&cru RGMII_MODE_CLK>; + assigned-clock-rates = <125000000>, <0>, <25000000>; pinctrl-names = "default"; pinctrl-0 = <&rgmiim1_pins &clk_out_ethernetm1_pins>;