From 50bc70c3f61f1cb9f10c16cef059352e12f5cbcd Mon Sep 17 00:00:00 2001 From: Wyon Bi Date: Sun, 9 Oct 2022 09:51:03 +0000 Subject: [PATCH] drm/bridge: analogix_dp: Fix stream valid control Add DT property 'analogix,force-stream-valid' to DTS node if want to support vrr. Fixes: 2abd3af02c10 ("drm/bridge: analogix_dp: Use video format information from register") Signed-off-by: Wyon Bi Change-Id: Ic4624e4ca3a03322f1d9520a7e3cee0d054c36ee --- drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 2 ++ drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 1 + drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 8 +++++--- 3 files changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c index 456d33c36d69..ead215ff6183 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c @@ -1998,6 +1998,8 @@ static int analogix_dp_dt_parse_pdata(struct analogix_dp_device *dp) video_info->video_bist_enable = of_property_read_bool(dp_node, "analogix,video-bist-enable"); + video_info->force_stream_valid = + of_property_read_bool(dp_node, "analogix,force-stream-valid"); prop = of_find_property(dp_node, "data-lanes", &len); if (!prop) { diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h index 090bc255042b..a843a739b76c 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h @@ -142,6 +142,7 @@ struct video_info { u32 lane_map[4]; bool video_bist_enable; + bool force_stream_valid; }; struct link_train { diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c index 663c56144af8..e756d7cd3d41 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c @@ -790,9 +790,11 @@ void analogix_dp_init_video(struct analogix_dp_device *dp) reg = CHA_CRI(4) | CHA_CTRL; analogix_dp_write(dp, ANALOGIX_DP_SYS_CTL_2, reg); - reg = analogix_dp_read(dp, ANALOGIX_DP_SYS_CTL_3); - reg |= VALID_CTRL | F_VALID; - analogix_dp_write(dp, ANALOGIX_DP_SYS_CTL_3, reg); + if (dp->video_info.force_stream_valid) { + reg = analogix_dp_read(dp, ANALOGIX_DP_SYS_CTL_3); + reg |= VALID_CTRL | F_VALID; + analogix_dp_write(dp, ANALOGIX_DP_SYS_CTL_3, reg); + } reg = VID_HRES_TH(2) | VID_VRES_TH(0); analogix_dp_write(dp, ANALOGIX_DP_VIDEO_CTL_8, reg);