diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 754e39bc0996..ddf8d644d719 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1151,6 +1151,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rv1106g-evb2-v11-emmc.dtb \
 	rv1106g-evb2-v11-trailcam-emmc.dtb \
 	rv1106g-evb2-v12-nofastae-emmc.dtb \
+	rv1106g-evb2-v12-nofastae-spi-nand.dtb \
 	rv1106g-evb2-v12-nofastae-spi-nor.dtb \
 	rv1106g-evb2-v12-wakeup.dtb \
 	rv1106g-smart-door-lock-rmsl-v10.dtb \
diff --git a/arch/arm/boot/dts/rv1106g-evb2-v12-nofastae-spi-nand.dts b/arch/arm/boot/dts/rv1106g-evb2-v12-nofastae-spi-nand.dts
new file mode 100644
index 000000000000..a7b53a738158
--- /dev/null
+++ b/arch/arm/boot/dts/rv1106g-evb2-v12-nofastae-spi-nand.dts
@@ -0,0 +1,129 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
+ */
+
+/dts-v1/;
+
+#include "rv1106.dtsi"
+#include "rv1106-evb-v10.dtsi"
+#include "rv1106-evb-cam.dtsi"
+#include "rv1106-tb-nofastae.dtsi"
+
+/ {
+	model = "Rockchip RV1106G EVB2 V12 Board SPI NAND";
+	compatible = "rockchip,rv1106g-evb2-v12", "rockchip,rv1106";
+	chosen {
+		bootargs = "loglevel=0 rootfstype=erofs rootflags=dax console=ttyFIQ0 root=/dev/rd0 snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0 driver_async_probe=dwmmc_rockchip";
+	};
+
+	vcc_1v8: vcc-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_1v8";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+	};
+
+	vcc_3v3: vcc-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_3v3";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+
+	vcc3v3_sd: vcc3v3-sd {
+		compatible = "regulator-fixed";
+		gpio = <&gpio2 RK_PA7 GPIO_ACTIVE_LOW>;
+		regulator-name = "vcc3v3_sd";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdmmc_pwren>;
+	};
+
+	wireless_wlan: wireless-wlan {
+		compatible = "wlan-platdata";
+		WIFI,host_wake_irq = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
+		status = "okay";
+	};
+};
+
+&fiq_debugger {
+	rockchip,baudrate = <1500000>;
+};
+
+&pinctrl {
+	sdmmc {
+		/omit-if-no-ref/
+		sdmmc_pwren: sdmmc-pwren {
+			rockchip,pins = <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&pwm10 {
+	status = "okay";
+};
+
+&pwm11 {
+	status = "okay";
+};
+
+&ramdisk_r {
+	reg = <0x800000 (15 * 0x00100000)>;
+};
+
+&ramdisk_c {
+	reg = <0x1700000 (10 * 0x00100000)>;
+};
+
+&sdio {
+	max-frequency = <50000000>;
+	bus-width = <1>;
+	cap-sd-highspeed;
+	cap-sdio-irq;
+	keep-power-in-suspend;
+	non-removable;
+	rockchip,default-sample-phase = <90>;
+	no-sd;
+	no-mmc;
+	supports-sdio;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdmmc1m0_cmd &sdmmc1m0_clk &sdmmc1m0_bus4>;
+	status = "okay";
+};
+
+&sdmmc {
+	max-frequency = <200000000>;
+	no-sdio;
+	no-mmc;
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	disable-wp;
+	pinctrl-names = "normal", "idle";
+	pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
+	pinctrl-1 = <&sdmmc0_idle_pins &sdmmc0_det>;
+	vmmc-supply = <&vcc3v3_sd>;
+	status = "okay";
+};
+
+&sfc {
+	status = "okay";
+
+	flash@0 {
+		compatible = "spi-nand";
+		reg = <0>;
+		spi-max-frequency = <75000000>;
+		spi-rx-bus-width = <4>;
+		spi-tx-bus-width = <1>;
+	};
+};
+
+&usbdrd_dwc3 {
+	dr_mode = "peripheral";
+};
diff --git a/arch/arm/mach-rockchip/rv1106_pm.c b/arch/arm/mach-rockchip/rv1106_pm.c
index 8725c4efd27a..7767b44c58d2 100644
--- a/arch/arm/mach-rockchip/rv1106_pm.c
+++ b/arch/arm/mach-rockchip/rv1106_pm.c
@@ -1036,7 +1036,18 @@ static int rockchip_lpmode_enter(unsigned long arg)
 
 	cpu_do_idle();
 
-	pr_err("%s: Failed to suspend\n", __func__);
+#if RV1106_WAKEUP_TO_SYSTEM_RESET
+	/* If reaches here, it means wakeup source cames before cpu enter wfi.
+	 * So we should do system reset if RV1106_WAKEUP_TO_SYSTEM_RESET.
+	 */
+	writel_relaxed(0x000c000c, cru_base + RV1106_CRU_GLB_RST_CON);
+	writel_relaxed(0xffff0000, pmugrf_base + RV1106_PMUGRF_SOC_CON(4));
+	writel_relaxed(0xffff0000, pmugrf_base + RV1106_PMUGRF_SOC_CON(5));
+	dsb(sy);
+	writel_relaxed(0xfdb9, cru_base + RV1106_CRU_GLB_SRST_FST);
+#endif
+
+	rkpm_printstr("Failed to suspend\n");
 
 	return 1;
 }
diff --git a/arch/arm/mach-rockchip/rv1106_pm.h b/arch/arm/mach-rockchip/rv1106_pm.h
index 61c3f9816d02..da857a5b6fa2 100644
--- a/arch/arm/mach-rockchip/rv1106_pm.h
+++ b/arch/arm/mach-rockchip/rv1106_pm.h
@@ -72,6 +72,8 @@
 #define RV1106_CRU_MODE_CON00		0x280
 #define RV1106_CRU_GATE_CON(i)		(0x800 + (i) * 4)
 #define RV1106_CRU_GATE_CON_NUM		4
+#define RV1106_CRU_GLB_SRST_FST		0xc08
+#define RV1106_CRU_GLB_RST_CON		0xc10
 
 #define CRU_PLLCON1_PWRDOWN		BIT(13)
 #define CRU_PLLCON1_LOCK_STATUS		BIT(10)
diff --git a/arch/arm/mach-rockchip/rv1106_sleep.S b/arch/arm/mach-rockchip/rv1106_sleep.S
index a8a8c1dfbfc2..bb50dff9263e 100644
--- a/arch/arm/mach-rockchip/rv1106_sleep.S
+++ b/arch/arm/mach-rockchip/rv1106_sleep.S
@@ -13,6 +13,9 @@
 #define RV1106_PMUGRF_SOC_CON4		0xff020010
 #define RV1106_CRU_GLB_SRST_FST		0xff3b0c08
 
+#define RV1106_CRU_GLB_RST_CON_ADDR	0xff3b0c10
+#define CRU_FST_RST_PMU_VAL		0x000c000c
+
 #if RV1106_SLEEP_DEBUG
 /********************* console used for sleep.S ******************************/
 #define UART_REG_DLL	(0x00)
@@ -98,6 +101,11 @@ ENTRY(rockchip_slp_cpu_resume)
 	ldr	r1, [r1]
 	str	r1, [r0]
 
+	/* enable first reset trigger pmu reset */
+	ldr	r0, =RV1106_CRU_GLB_RST_CON_ADDR
+	ldr	r1, =CRU_FST_RST_PMU_VAL
+	str	r1, [r0]
+
 	/* clear pmu reset hold */
 	ldr	r0, =RV1106_PMUGRF_SOC_CON4
 	ldr	r1, =0xffff0000
diff --git a/drivers/input/touchscreen/gt1x/gt1x.c b/drivers/input/touchscreen/gt1x/gt1x.c
index 21a19a07d606..a1e829836d5f 100644
--- a/drivers/input/touchscreen/gt1x/gt1x.c
+++ b/drivers/input/touchscreen/gt1x/gt1x.c
@@ -654,6 +654,18 @@ static void gt1x_ts_remove(struct i2c_client *client)
 }
 
 #if defined(CONFIG_FB)
+#include <linux/async.h>
+
+static void gt1x_resume_async(void *data, async_cookie_t cookie)
+{
+	gt1x_resume();
+}
+
+static void gt1x_suspend_async(void *data, async_cookie_t cookie)
+{
+	gt1x_suspend();
+}
+
 /* frame buffer notifier block control the suspend/resume procedure */
 static struct notifier_block gt1x_fb_notifier;
 static int tp_status;
@@ -684,7 +696,7 @@ static int gtp_fb_notifier_callback(struct notifier_block *noti, unsigned long e
 		if (*blank == FB_BLANK_UNBLANK) {
 			tp_status = *blank;
 			GTP_DEBUG("Resume by fb notifier.");
-			gt1x_resume();
+			async_schedule(gt1x_resume_async, NULL);
 		}
 	}
 #endif
@@ -695,7 +707,7 @@ static int gtp_fb_notifier_callback(struct notifier_block *noti, unsigned long e
 		if (*blank == FB_BLANK_POWERDOWN) {
 			tp_status = *blank;
 			GTP_DEBUG("Suspend by fb notifier.");
-			gt1x_suspend();
+			async_schedule(gt1x_suspend_async, NULL);
 		}
 	}
 
diff --git a/drivers/soc/rockchip/fiq_debugger/rk_fiq_debugger.c b/drivers/soc/rockchip/fiq_debugger/rk_fiq_debugger.c
index 3357ea712110..ed79ec44c4ad 100644
--- a/drivers/soc/rockchip/fiq_debugger/rk_fiq_debugger.c
+++ b/drivers/soc/rockchip/fiq_debugger/rk_fiq_debugger.c
@@ -179,11 +179,13 @@ static int debug_getc(struct platform_device *pdev)
 
 	if (lsr & UART_LSR_DR) {
 		temp = rk_fiq_read(t, UART_RX);
-		buf[n & 0x1f] = temp;
-		n++;
-		if (temp == 'q' && n > 2) {
-			if ((buf[(n - 2) & 0x1f] == 'i') &&
-			    (buf[(n - 3) & 0x1f] == 'f'))
+		buf[++n & 0x1f] = temp;
+
+		if (temp == 'q') {
+			if ((buf[(n - 1) & 0x1f] == 'i') &&
+			    (buf[(n - 2) & 0x1f] == 'f') &&
+			    (buf[(n - 3) & 0x1f] != '_') &&
+			    (buf[(n - 3) & 0x1f] != ' '))
 				return FIQ_DEBUGGER_BREAK;
 			else
 				return temp;
diff --git a/net/rfkill/rfkill-bt.c b/net/rfkill/rfkill-bt.c
index b3567912e24b..73b802c7faa4 100644
--- a/net/rfkill/rfkill-bt.c
+++ b/net/rfkill/rfkill-bt.c
@@ -175,15 +175,11 @@ static int rfkill_rk_setup_wake_irq(struct rfkill_rk_data *rfkill, int flag)
 		rfkill->irq_req = 1;
 		LOG("** disable irq\n");
 		disable_irq(irq->irq);
-		ret = enable_irq_wake(irq->irq);
-		if (ret)
-			goto fail3;
+		/*ret = disable_irq_wake(irq->irq);init irq wake is disabled,no need to disable*/
 	}
 
 	return ret;
 
-fail3:
-	free_irq(irq->irq, rfkill);
 fail2:
 	gpio_free(irq->gpio.io);
 fail1:
@@ -292,12 +288,6 @@ static int rfkill_rk_set_power(void *data, bool blocked)
 
 	toggle = rfkill->pdata->power_toggle;
 
-	if (toggle) {
-		if (rfkill_get_wifi_power_state(&wifi_power)) {
-			LOG("%s: cannot get wifi power state!\n", __func__);
-			return -1;
-		}
-	}
 
 	DBG("%s: toggle = %s\n", __func__, toggle ? "true" : "false");
 
@@ -372,6 +362,10 @@ static int rfkill_rk_set_power(void *data, bool blocked)
 			}
 		}
 		if (toggle) {
+			if (rfkill_get_wifi_power_state(&wifi_power)) {
+				LOG("%s: cannot get wifi power state!\n", __func__);
+				return -EPERM;
+			}
 			if (!wifi_power) {
 				LOG("%s: bt will set vbat to low\n", __func__);
 				rfkill_set_wifi_bt_power(0);
@@ -413,6 +407,7 @@ static int rfkill_rk_pm_prepare(struct device *dev)
 	if (gpio_is_valid(wake_host_irq->gpio.io) && bt_power_state) {
 		DBG("enable irq for bt wakeup host\n");
 		enable_irq(wake_host_irq->irq);
+		enable_irq_wake(wake_host_irq->irq);
 	}
 
 #ifdef CONFIG_RFKILL_RESET
@@ -442,6 +437,7 @@ static void rfkill_rk_pm_complete(struct device *dev)
 	if (gpio_is_valid(wake_host_irq->gpio.io) && bt_power_state) {
 		LOG("** disable irq\n");
 		disable_irq(wake_host_irq->irq);
+		disable_irq_wake(wake_host_irq->irq);
 	}
 
 	if (rfkill->pdata->pinctrl && gpio_is_valid(rts->io)) {
diff --git a/net/rfkill/rfkill-wlan.c b/net/rfkill/rfkill-wlan.c
index 89d9787b9ad9..338b59c53dbc 100644
--- a/net/rfkill/rfkill-wlan.c
+++ b/net/rfkill/rfkill-wlan.c
@@ -319,6 +319,11 @@ int rockchip_wifi_power(int on)
 			}
 
 			wifi_power_state = 0;
+
+			if (!rfkill_get_bt_power_state(&bt_power, &toggle)) {
+				LOG("%s: toggle = %s\n", __func__, toggle ? "true" : "false");
+			}
+
 			if (toggle) {
 				if (!bt_power) {
 					LOG("%s: wifi will set vbat to low\n", __func__);