diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a86253e5342b..09a60960c2d9 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -856,6 +856,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rv1126-evb-ddr3-v12.dtb \
 	rv1126-evb-ddr3-v12-robot.dtb \
 	rv1126-evb-ddr3-v12-spi-nand.dtb \
+	rv1126-evb-ddr3-v12-spi-nor.dtb \
 	rv1126-evb-ddr3-v12-tb-emmc.dtb \
 	rv1126-evb-lp3-v10.dtb \
 	rv1126-iotest-v10.dtb \
diff --git a/arch/arm/boot/dts/rv1126-evb-ddr3-v12-spi-nor.dts b/arch/arm/boot/dts/rv1126-evb-ddr3-v12-spi-nor.dts
new file mode 100644
index 000000000000..38a64e667a1d
--- /dev/null
+++ b/arch/arm/boot/dts/rv1126-evb-ddr3-v12-spi-nor.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
+ */
+
+/dts-v1/;
+#include "rv1126.dtsi"
+#include "rv11xx-evb-v12.dtsi"
+
+/ {
+	model = "Rockchip RV1126 SPI NOR DDR3 Board";
+	compatible = "rockchip,rv1126-evb-ddr3-v12-spi-nor", "rockchip,rv1126";
+
+	chosen {
+		bootargs = "earlycon=uart8250,mmio32,0xff570000 console=ttyFIQ0 root=/dev/mtdblock3 rootfstype=squashfs rootwait snd_aloop.index=7";
+	};
+
+};