From 51f120552cc6a4980a40daca656a76b5c4dc5ca6 Mon Sep 17 00:00:00 2001 From: Chaoyi Chen Date: Fri, 16 May 2025 14:22:25 +0800 Subject: [PATCH] drm/rockchip: vop: Fix writeback interrupt process Fixes: f7e3199891ae ("drm/rockchip: vop: Add writeback support") Change-Id: I6740c489e472368be4b081c5490a776de535c5e7 Signed-off-by: Chaoyi Chen --- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 14 +++++++++++--- drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 4 +++- 2 files changed, 14 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index c7df6a48f10a..0a11e344a4cc 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -1832,16 +1832,24 @@ static uint32_t vop_read_and_clear_wb_irqs(struct vop *vop) const struct vop_data *vop_data = vop->data; const struct vop_intr *intr = vop_data->wb_intr; uint32_t irqs = VOPL_WB_UV_FIFO_FULL_INTR | VOPL_WB_YRGB_FIFO_FULL_INTR; - uint32_t val; + uint32_t val, ret; if (!intr) return 0; val = VOP_INTR_GET_TYPE2(vop, intr, status, irqs); + ret = val; + + /* For RV1126B, it should use VOPL_WB_YRGB_FIFO_FULL_INTR to + * clear all wb interrupt. + */ + if (vop->version == VOP_VERSION_RV1126B) + val |= VOPL_WB_YRGB_FIFO_FULL_INTR; + if (val) VOP_INTR_SET_TYPE2(vop, intr, clear, val, 1); - return val; + return ret; } static void vop_wb_commit(struct drm_crtc *crtc) @@ -5363,7 +5371,7 @@ static irqreturn_t vop_isr(int irq, void *data) spin_unlock_irqrestore(&vop->irq_lock, flags); /* This is expected for vop iommu irqs, since the irq is shared */ - if (!active_irqs) + if (!active_irqs && !wb_irqs) goto out_disable; if (active_irqs & DSP_HOLD_VALID_INTR) { diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index 427643e37948..0793b7cad774 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -2039,8 +2039,10 @@ static const struct vop_wb_regs rv1126b_vop_wb_regs = { }; static const int rv1126_wb_intrs[] = { - VOPL_WB_UV_FIFO_FULL_INTR, VOPL_WB_YRGB_FIFO_FULL_INTR, + VOPL_WB_UV_FIFO_FULL_INTR, + 0, + 0, VOPL_WB_COMPLETE_INTR, };