From 523b04c03acda15592fa7b8ad0aecfe78a76491a Mon Sep 17 00:00:00 2001
From: Simon Xue <xxm@rock-chips.com>
Date: Tue, 31 Aug 2021 16:17:50 +0800
Subject: [PATCH] arm64: dts: rockchip: rk3588s: add saradc node

Change-Id: I0e8e972fc867cc8dd65b33244e68442b8d043b5d
Signed-off-by: Simon Xue <xxm@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
index 1d474204ac5c..b82d16aea471 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -1551,6 +1551,18 @@
 		status = "disabled";
 	};
 
+	saradc: saradc@fec10000 {
+		compatible = "rockchip,rk3588-saradc";
+		reg = <0x0 0xfec10000 0x0 0x10000>;
+		interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>;
+		#io-channel-cells = <1>;
+		clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>;
+		clock-names = "saradc", "apb_pclk";
+		resets = <&cru SRST_P_SARADC>;
+		reset-names = "saradc-apb";
+		status = "disabled";
+	};
+
 	otp: otp@fecc0000 {
 		compatible = "rockchip,rk3588-otp";
 		reg = <0x0 0xfecc0000 0x0 0x400>;