diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
index 1b572ecc91bd..107151a0b092 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
@@ -7015,7 +7015,6 @@ static void vop2_crtc_atomic_enable(struct drm_crtc *crtc, struct drm_crtc_state
 	u16 vact_st = adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vsync_start;
 	u16 vact_end = vact_st + vdisplay;
 	bool interlaced = !!(adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE);
-	uint8_t out_mode;
 	bool dclk_inv, yc_swap = false;
 	int act_end;
 	uint32_t val;
@@ -7290,18 +7289,6 @@ static void vop2_crtc_atomic_enable(struct drm_crtc *crtc, struct drm_crtc_state
 		VOP_CTRL_SET(vop2, hdmi_dclk_pol, 1);
 	}
 
-	if ((vcstate->output_mode == ROCKCHIP_OUT_MODE_AAAA &&
-	     !(vp_data->feature & VOP_FEATURE_OUTPUT_10BIT)) ||
-	    vcstate->output_if & VOP_OUTPUT_IF_BT656)
-		out_mode = ROCKCHIP_OUT_MODE_P888;
-	else
-		out_mode = vcstate->output_mode;
-	VOP_MODULE_SET(vop2, vp, out_mode, out_mode);
-
-	vop2_post_color_swap(crtc);
-
-	vop2_dither_setup(crtc);
-
 	VOP_MODULE_SET(vop2, vp, splice_en, splice_en);
 
 	VOP_MODULE_SET(vop2, vp, htotal_pw, (htotal << 16) | hsync_len);
@@ -8738,9 +8725,22 @@ static void vop2_cfg_update(struct drm_crtc *crtc,
 	struct vop2_video_port *splice_vp = &vop2->vps[vp_data->splice_vp_id];
 	uint32_t val;
 	uint32_t r, g, b;
+	uint8_t out_mode;
 
 	spin_lock(&vop2->reg_lock);
 
+	if ((vcstate->output_mode == ROCKCHIP_OUT_MODE_AAAA &&
+	     !(vp_data->feature & VOP_FEATURE_OUTPUT_10BIT)) ||
+	    vcstate->output_if & VOP_OUTPUT_IF_BT656)
+		out_mode = ROCKCHIP_OUT_MODE_P888;
+	else
+		out_mode = vcstate->output_mode;
+	VOP_MODULE_SET(vop2, vp, out_mode, out_mode);
+
+	vop2_post_color_swap(crtc);
+
+	vop2_dither_setup(crtc);
+
 	VOP_MODULE_SET(vop2, vp, overlay_mode, vcstate->yuv_overlay);
 
 	/*