mirror of
https://github.com/hardkernel/linux.git
synced 2026-06-09 20:32:04 +09:00
rk3066b: remove support old iomux api
This commit is contained in:
黄涛
@@ -10,7 +10,7 @@ obj-y += ddr.o
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CFLAGS_ddr.o += -mthumb
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obj-y += devices.o
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obj-y += io.o
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obj-y += iomux.o
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obj-$(CONFIG_ARCH_RK30XX) += iomux.o
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obj-y += pmu.o
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obj-y += reset.o
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obj-y += timer.o
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84
arch/arm/mach-rk30/include/mach/grf-rk3066b.h
Normal file
84
arch/arm/mach-rk30/include/mach/grf-rk3066b.h
Normal file
@@ -0,0 +1,84 @@
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#ifndef __MACH_GRF_RK3066B_H
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#define __MACH_GRF_RK3066B_H
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#define GRF_GPIO0L_DIR 0x0000
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#define GRF_GPIO0H_DIR 0x0004
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#define GRF_GPIO1L_DIR 0x0008
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#define GRF_GPIO1H_DIR 0x000c
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#define GRF_GPIO2L_DIR 0x0010
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#define GRF_GPIO2H_DIR 0x0014
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#define GRF_GPIO3L_DIR 0x0018
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#define GRF_GPIO3H_DIR 0x001c
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#define GRF_GPIO0L_DO 0x0020
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#define GRF_GPIO0H_DO 0x0024
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#define GRF_GPIO1L_DO 0x0028
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#define GRF_GPIO1H_DO 0x002c
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#define GRF_GPIO2L_DO 0x0030
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#define GRF_GPIO2H_DO 0x0034
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#define GRF_GPIO3L_DO 0x0038
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#define GRF_GPIO3H_DO 0x003c
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#define GRF_GPIO0L_EN 0x0040
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#define GRF_GPIO0H_EN 0x0044
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#define GRF_GPIO1L_EN 0x0048
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#define GRF_GPIO1H_EN 0x004c
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#define GRF_GPIO2L_EN 0x0050
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#define GRF_GPIO2H_EN 0x0054
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#define GRF_GPIO3L_EN 0x0058
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#define GRF_GPIO3H_EN 0x005c
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#define GRF_GPIO0A_IOMUX 0x0060
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#define GRF_GPIO0B_IOMUX 0x0064
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#define GRF_GPIO0C_IOMUX 0x0068
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#define GRF_GPIO0D_IOMUX 0x006c
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#define GRF_GPIO1A_IOMUX 0x0070
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#define GRF_GPIO1B_IOMUX 0x0074
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#define GRF_GPIO1C_IOMUX 0x0078
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#define GRF_GPIO1D_IOMUX 0x007c
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#define GRF_GPIO2A_IOMUX 0x0080
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#define GRF_GPIO2B_IOMUX 0x0084
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#define GRF_GPIO2C_IOMUX 0x0088
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#define GRF_GPIO2D_IOMUX 0x008c
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#define GRF_GPIO3A_IOMUX 0x0090
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#define GRF_GPIO3B_IOMUX 0x0094
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#define GRF_GPIO3C_IOMUX 0x0098
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#define GRF_GPIO3D_IOMUX 0x009c
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#define GRF_SOC_CON0 0x00a0
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#define GRF_SOC_CON1 0x00a4
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#define GRF_SOC_CON2 0x00a8
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#define GRF_SOC_STATUS0 0x00ac
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#define GRF_DMAC1_CON0 0x00b0
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#define GRF_DMAC1_CON1 0x00b4
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#define GRF_DMAC1_CON2 0x00b8
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#define GRF_DMAC2_CON0 0x00bc
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#define GRF_DMAC2_CON1 0x00c0
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#define GRF_DMAC2_CON2 0x00c4
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#define GRF_DMAC2_CON3 0x00c8
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#define GRF_IO_CON0 0x00f4
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#define GRF_IO_CON1 0x00f8
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#define GRF_IO_CON2 0x00fc
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#define GRF_IO_CON3 0x0100
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#define GRF_IO_CON4 0x0104
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#define GRF_UOC0_CON0 0x010c
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#define GRF_UOC0_CON1 0x0110
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#define GRF_UOC0_CON2 0x0114
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#define GRF_UOC0_CON3 0x0118
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#define GRF_UOC1_CON0 0x011c
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#define GRF_UOC1_CON1 0x0120
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#define GRF_UOC1_CON2 0x0124
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#define GRF_UOC1_CON3 0x0128
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#define GRF_UOC2_CON0 0x012c
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#define GRF_UOC2_CON1 0x0130
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#define GRF_UOC3_CON0 0x0138
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#define GRF_UOC3_CON1 0x013c
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#define GRF_HSIC_STAT 0x0140
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#define GRF_DDRC_CON0 0x00ec
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#define GRF_DDRC_STAT 0x00f0
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#define GRF_OS_REG0 0x0144
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#define GRF_OS_REG1 0x0148
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#define GRF_OS_REG2 0x014c
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#define GRF_OS_REG3 0x0150
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#define GRF_OS_REG4 0x0154
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#define GRF_OS_REG5 0x0158
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#define GRF_OS_REG6 0x015c
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#define GRF_OS_REG7 0x0160
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#endif
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@@ -1,538 +0,0 @@
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//GPIO0C
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#define GPIO0C_GPIO0C0 0
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#define GPIO0C_FLASHDATA8 1
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#define GPIO0C_GPIO0C1 0
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#define GPIO0C_FLASHDATA9 1
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#define GPIO0C_GPIO0C2 0
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#define GPIO0C_FLASHDATA10 1
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#define GPIO0C_GPIO0C3 0
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#define GPIO0C_FLASHDATA11 1
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#define GPIO0C_GPIO0C4 0
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#define GPIO0C_FLASHDATA12 1
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#define GPIO0C_GPIO0C5 0
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#define GPIO0C_FLASHDATA13 1
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#define GPIO0C_GPIO0C6 0
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#define GPIO0C_FLASHDATA14 1
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#define GPIO0C_GPIO0C7 0
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#define GPIO0C_FLASHDATA15 1
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//GPIO0D
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#define GPIO0D_GPIO0D0 0
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#define GPIO0D_FLASHDQS 1
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#define GPIO0D_EMMCCLKOUT 2
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#define GPIO0D_GPIO0D1 0
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#define GPIO0D_FLASHCSN1 1
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#define GPIO0D_GPIO0D2 0
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#define GPIO0D_FLASHCSN2 1
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#define GPIO0D_EMMCCMD 2
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#define GPIO0D_GPIO0D3 0
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#define GPIO0D_FLASHCSN3 1
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#define GPIO0D_EMMCRSTNOUT 2
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#define GPIO0D_GPIO0D4 0
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#define GPIO0D_SPI1RXD 1
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#define GPIO0D_GPIO0D5 0
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#define GPIO0D_SPI1TXD 1
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#define GPIO0D_GPIO0D6 0
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#define GPIO0D_SPI1CLK 1
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#define GPIO0D_GPIO0D7 0
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#define GPIO0D_SPI1CSN0 1
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//GPIO1A
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#define GPIO1A_GPIO1A0 0
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#define GPIO1A_UART0SIN 1
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#define GPIO1A_GPIO1A1 0
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#define GPIO1A_UART0SOUT 1
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#define GPIO1A_GPIO1A2 0
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#define GPIO1A_UART0CTSN 1
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#define GPIO1A_GPIO1A3 0
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#define GPIO1A_UART0RTSN 1
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#define GPIO1A_GPIO1A4 0
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#define GPIO1A_UART1SIN 1
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#define GPIO1A_SPI0RXD 2
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#define GPIO1A_GPIO1A5 0
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#define GPIO1A_UART1SOUT 1
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#define GPIO1A_SPI0TXD 2
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#define GPIO1A_GPIO1A6 0
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#define GPIO1A_UART1CTSN 1
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#define GPIO1A_SPI0CLK 2
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#define GPIO1A_GPIO1A7 0
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#define GPIO1A_UART1RTSN 1
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#define GPIO1A_SPI0CSN0 2
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//GPIO1B
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#define GPIO1B_GPIO1B0 0
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#define GPIO1B_UART2SIN 1
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#define GPIO1B_JTAGTDI 2
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#define GPIO1B_GPIO1B1 0
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#define GPIO1B_UART2SOUT 1
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#define GPIO1B_JTAGTDO 2
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#define GPIO1B_GPIO1B2 0
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#define GPIO1B_UART3SIN 1
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#define GPIO1B_GPSMAG 2
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#define GPIO1B_GPIO1B3 0
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#define GPIO1B_UART3SOUT 1
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#define GPIO1B_GPSSIG 2
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#define GPIO1B_GPIO1B4 0
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#define GPIO1B_UART3CTSN 1
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#define GPIO1B_GPSRFCLK 2
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#define GPIO1B_GPIO1B5 0
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#define GPIO1B_UART3RTSN 1
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#define GPIO1B_GPIO1B6 0
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#define GPIO1B_SPDIFTX 1
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#define GPIO1B_SPI1CSN1 2
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#define GPIO1B_GPIO1B7 0
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#define GPIO1B_SPI0CSN1 1
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//GPIO1C
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#define GPIO1C_GPIO1C0 0
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#define GPIO1C_I2SCLK 1
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#define GPIO1C_GPIO1C1 0
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#define GPIO1C_I2SSCLK 1
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#define GPIO1C_GPIO1C2 0
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#define GPIO1C_I2SLRCLKRX 1
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#define GPIO1C_GPIO1C3 0
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#define GPIO1C_I2SLRCLKTX 1
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#define GPIO1C_GPIO1C4 0
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#define GPIO1C_I2SSDI 1
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#define GPIO1C_GPIO1C5 0
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#define GPIO1C_I2SSDO 1
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//GPIO1D
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#define GPIO1D_GPIO1D0 0
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#define GPIO1D_I2C0SDA 1
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#define GPIO1D_GPIO1D1 0
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#define GPIO1D_I2C0SCL 1
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#define GPIO1D_GPIO1D2 0
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#define GPIO1D_I2C1SDA 1
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#define GPIO1D_GPIO1D3 0
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#define GPIO1D_I2C1SCL 1
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#define GPIO1D_GPIO1D4 0
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#define GPIO1D_I2C2SDA 1
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#define GPIO1D_GPIO1D5 0
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#define GPIO1D_I2C2SCL 1
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#define GPIO1D_GPIO1D6 0
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#define GPIO1D_I2C4SDA 1
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#define GPIO1D_GPIO1D7 0
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#define GPIO1D_I2C4SCL 1
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//GPIO2A
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#define GPIO2A_GPIO2A0 0
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#define GPIO2A_LCDC1DATA0 1
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#define GPIO2A_SMCDATA0 2
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#define GPIO2A_TRACEDATA0 3
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#define GPIO2A_GPIO2A1 0
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#define GPIO2A_LCDC1DATA1 1
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#define GPIO2A_SMCDATA1 2
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#define GPIO2A_TRACEDATA1 3
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#define GPIO2A_GPIO2A2 0
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#define GPIO2A_LCDC1DATA2 1
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#define GPIO2A_SMCDATA2 2
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#define GPIO2A_TRACEDATA2 3
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#define GPIO2A_GPIO2A3 0
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#define GPIO2A_LCDC1DATA3 1
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#define GPIO2A_SMCDATA3 2
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#define GPIO2A_TRACEDATA3 3
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#define GPIO2A_GPIO2A4 0
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#define GPIO2A_LCDC1DATA4 1
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#define GPIO2A_SMCDATA4 2
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#define GPIO2A_TRACEDATA4 3
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#define GPIO2A_GPIO2A5 0
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#define GPIO2A_LCDC1DATA5 1
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#define GPIO2A_SMCDATA5 2
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#define GPIO2A_TRACEDATA5 3
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#define GPIO2A_GPIO2A6 0
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#define GPIO2A_LCDC1DATA6 1
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#define GPIO2A_SMCDATA6 2
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#define GPIO2A_TRACEDATA6 3
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#define GPIO2A_GPIO2A7 0
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#define GPIO2A_LCDC1DATA7 1
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#define GPIO2A_SMCDATA7 2
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#define GPIO2A_TRACEDATA7 3
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//GPIO2B
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#define GPIO2B_GPIO2B0 0
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#define GPIO2B_LCDC1DATA8 1
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#define GPIO2B_SMCDATA8 2
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#define GPIO2B_TRACEDATA8 3
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#define GPIO2B_GPIO2B1 0
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#define GPIO2B_LCDC1DATA9 1
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#define GPIO2B_SMCDATA9 2
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#define GPIO2B_TRACEDATA9 3
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#define GPIO2B_GPIO2B2 0
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#define GPIO2B_LCDC1DATA10 1
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#define GPIO2B_SMCDATA10 2
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#define GPIO2B_TRACEDATA10 3
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#define GPIO2B_GPIO2B3 0
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#define GPIO2B_LCDC1DATA11 1
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#define GPIO2B_SMCDATA11 2
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#define GPIO2B_TRACEDATA11 3
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#define GPIO2B_GPIO2B4 0
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#define GPIO2B_LCDC1DATA12 1
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#define GPIO2B_SMCDATA12 2
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#define GPIO2B_TRACEDATA12 3
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#define GPIO2B_GPIO2B5 0
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#define GPIO2B_LCDC1DATA13 1
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#define GPIO2B_SMCDATA13 2
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#define GPIO2B_TRACEDATA13 3
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#define GPIO2B_GPIO2B6 0
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#define GPIO2B_LCDC1DATA14 1
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#define GPIO2B_SMCDATA14 2
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#define GPIO2B_TRACEDATA14 3
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#define GPIO2B_GPIO2B7 0
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#define GPIO2B_LCDC1DATA15 1
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#define GPIO2B_SMCDATA15 2
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#define GPIO2B_TRACEDATA15 3
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//GPIO2C
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#define GPIO2C_GPIO2C0 0
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#define GPIO2C_LCDC1DATA16 1
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#define GPIO2C_SMCADDR0 2
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#define GPIO2C_GPIO2C1 0
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#define GPIO2C_LCDC1DATA17 1
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#define GPIO2C_SMCADDR1 2
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#define GPIO2C_TRACECLK 3
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#define GPIO2C_GPIO2C2 0
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#define GPIO2C_LCDC1DATA18 1
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#define GPIO2C_TRACECTL 3
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#define GPIO2C_SMCADDR2 2
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#define GPIO2C_GPIO2C3 0
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#define GPIO2C_LCDC1DATA19 1
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#define GPIO2C_SMCADDR3 2
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#define GPIO2C_GPIO2C4 0
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#define GPIO2C_LCDC1DATA20 1
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#define GPIO2C_SMCADDR4 2
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#define GPIO2C_GPIO2C5 0
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#define GPIO2C_LCDC1DATA21 1
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#define GPIO2C_SMCADDR5 2
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#define GPIO2C_GPIO2C6 0
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#define GPIO2C_LCDC1DATA22 1
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#define GPIO2C_SMCADDR6 2
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#define GPIO2C_GPIO2C7 0
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#define GPIO2C_LCDC1DATA23 1
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#define GPIO2C_SMCADDR7 2
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//GPIO2D
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#define GPIO2D_GPIO2D0 0
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#define GPIO2D_LCDC1DCLK 1
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#define GPIO2D_SMCCSN0 2
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#define GPIO2D_GPIO2D1 0
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#define GPIO2D_LCDC1DEN 1
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#define GPIO2D_SMCWEN 2
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#define GPIO2D_GPIO2D2 0
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#define GPIO2D_LCDC1HSYNC 1
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#define GPIO2D_SMCOEN 2
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#define GPIO2D_GPIO2D3 0
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#define GPIO2D_LCDC1VSYNC 1
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#define GPIO2D_SMCADVN 2
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#define GPIO2D_GPIO2D4 0
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#define GPIO2D_SMCBLSN0 1
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#define GPIO2D_GPIO2D5 0
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#define GPIO2D_SMCBLSN1 1
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#define GPIO2D_GPIO2D6 0
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#define GPIO2D_SMCCSN1 1
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#define GPIO2D_GPIO2D7 0
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#define GPIO2D_TESTCLOCKOUT 1
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//GPIO3A
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#define GPIO3A_GPIO3A0 0
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#define GPIO3A_SDMMC0RSTNOUT 1
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#define GPIO3A_GPIO3A1 0
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#define GPIO3A_SDMMC0PWREN 1
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#define GPIO3A_GPIO3A2 0
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#define GPIO3A_SDMMC0CLKOUT 1
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#define GPIO3A_GPIO3A3 0
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#define GPIO3A_SDMMC0CMD 1
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#define GPIO3A_GPIO3A4 0
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#define GPIO3A_SDMMC0DATA0 1
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#define GPIO3A_GPIO3A5 0
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#define GPIO3A_SDMMC0DATA1 1
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#define GPIO3A_GPIO3A6 0
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#define GPIO3A_SDMMC0DATA2 1
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#define GPIO3A_GPIO3A7 0
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#define GPIO3A_SDMMC0DATA3 1
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//GPIO3B
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#define GPIO3B_GPIO3B0 0
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#define GPIO3B_SDMMC0DETECTN 1
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#define GPIO3B_GPIO3B1 0
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#define GPIO3B_SDMMC0WRITEPRT 1
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#define GPIO3B_GPIO3B3 0
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#define GPIO3B_CIFCLKOUT 1
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#define GPIO3B_GPIO3B4 0
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#define GPIO3B_CIFDATA0 1
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#define GPIO3B_HSADCDATA8 2
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#define GPIO3B_GPIO3B5 0
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#define GPIO3B_CIFDATA1 1
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#define GPIO3B_HSADCDATA9 2
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#define GPIO3B_GPIO3B6 0
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#define GPIO3B_CIFDATA10 1
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#define GPIO3B_I2C3SDA 2
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#define GPIO3B_GPIO3B7 0
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#define GPIO3B_CIFDATA11 1
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#define GPIO3B_I2C3SCL 2
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//GPIO3C
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#define GPIO3C_GPIO3C0 0
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#define GPIO3C_SDMMC1CMD 1
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#define GPIO3C_RMIITXEN 2
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#define GPIO3C_GPIO3C1 0
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#define GPIO3C_SDMMC1DATA0 1
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#define GPIO3C_RMIITXD1 2
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#define GPIO3C_GPIO3C2 0
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#define GPIO3C_SDMMC1DATA1 1
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#define GPIO3C_RMIITXD0 2
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#define GPIO3C_GPIO3C3 0
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#define GPIO3C_SDMMC1DATA2 1
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#define GPIO3C_RMIIRXD0 2
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#define GPIO3C_GPIO3C4 0
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#define GPIO3C_SDMMC1DATA3 1
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#define GPIO3C_RMIIRXD1 2
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#define GPIO3C_GPIO3C5 0
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#define GPIO3C_SDMMC1CLKOUT 1
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#define GPIO3C_RMIICLKOUT 2
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#define GPIO3C_RMIICLKIN 3
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#define GPIO3C_GPIO3C6 0
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#define GPIO3C_SDMMC1DETECTN 1
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#define GPIO3C_RMIIRXERR 2
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#define GPIO3C_GPIO3C7 0
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#define GPIO3C_SDMMC1WRITEPRT 1
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#define GPIO3C_RMIICRS 2
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//GPIO3D
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#define GPIO3D_GPIO3D0 0
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#define GPIO3D_SDMMC1PWREN 1
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||||
#define GPIO3D_MIIMD 2
|
||||
#define GPIO3D_GPIO3D1 0
|
||||
#define GPIO3D_SDMMC1BACKENPWR 1
|
||||
#define GPIO3D_MIIMDCLK 2
|
||||
#define GPIO3D_GPIO3D2 0
|
||||
#define GPIO3D_SDMMC1INTN 1
|
||||
#define GPIO3D_GPIO3D3 0
|
||||
#define GPIO3D_PWM0 1
|
||||
#define GPIO3D_GPIO3D4 0
|
||||
#define GPIO3D_PWM1 1
|
||||
#define GPIO3D_JTAGTRSTN 2
|
||||
#define GPIO3D_GPIO3D5 0
|
||||
#define GPIO3D_PWM2 1
|
||||
#define GPIO3D_JTAGTCK 2
|
||||
#define GPIO3D_OTGDRVVBUS 3
|
||||
#define GPIO3D_GPIO3D6 0
|
||||
#define GPIO3D_PWM3 1
|
||||
#define GPIO3D_JTAGTMS 2
|
||||
#define GPIO3D_HOSTDRVVBUS 3
|
||||
|
||||
#define GRF_GPIO0L_DIR 0x0000
|
||||
#define GRF_GPIO0H_DIR 0x0004
|
||||
#define GRF_GPIO1L_DIR 0x0008
|
||||
#define GRF_GPIO1H_DIR 0x000c
|
||||
#define GRF_GPIO2L_DIR 0x0010
|
||||
#define GRF_GPIO2H_DIR 0x0014
|
||||
#define GRF_GPIO3L_DIR 0x0018
|
||||
#define GRF_GPIO3H_DIR 0x001c
|
||||
#define GRF_GPIO0L_DO 0x0020
|
||||
#define GRF_GPIO0H_DO 0x0024
|
||||
#define GRF_GPIO1L_DO 0x0028
|
||||
#define GRF_GPIO1H_DO 0x002c
|
||||
#define GRF_GPIO2L_DO 0x0030
|
||||
#define GRF_GPIO2H_DO 0x0034
|
||||
#define GRF_GPIO3L_DO 0x0038
|
||||
#define GRF_GPIO3H_DO 0x003c
|
||||
#define GRF_GPIO0L_EN 0x0040
|
||||
#define GRF_GPIO0H_EN 0x0044
|
||||
#define GRF_GPIO1L_EN 0x0048
|
||||
#define GRF_GPIO1H_EN 0x004c
|
||||
#define GRF_GPIO2L_EN 0x0050
|
||||
#define GRF_GPIO2H_EN 0x0054
|
||||
#define GRF_GPIO3L_EN 0x0058
|
||||
#define GRF_GPIO3H_EN 0x005c
|
||||
#define GRF_GPIO0A_IOMUX RK30_GRF_BASE+0x0060
|
||||
#define GRF_GPIO0B_IOMUX RK30_GRF_BASE+0x0064
|
||||
#define GRF_GPIO0C_IOMUX RK30_GRF_BASE+0x0068
|
||||
#define GRF_GPIO0D_IOMUX RK30_GRF_BASE+0x006c
|
||||
#define GRF_GPIO1A_IOMUX RK30_GRF_BASE+0x0070
|
||||
#define GRF_GPIO1B_IOMUX RK30_GRF_BASE+0x0074
|
||||
#define GRF_GPIO1C_IOMUX RK30_GRF_BASE+0x0078
|
||||
#define GRF_GPIO1D_IOMUX RK30_GRF_BASE+0x007c
|
||||
#define GRF_GPIO2A_IOMUX RK30_GRF_BASE+0x0080
|
||||
#define GRF_GPIO2B_IOMUX RK30_GRF_BASE+0x0084
|
||||
#define GRF_GPIO2C_IOMUX RK30_GRF_BASE+0x0088
|
||||
#define GRF_GPIO2D_IOMUX RK30_GRF_BASE+0x008c
|
||||
#define GRF_GPIO3A_IOMUX RK30_GRF_BASE+0x0090
|
||||
#define GRF_GPIO3B_IOMUX RK30_GRF_BASE+0x0094
|
||||
#define GRF_GPIO3C_IOMUX RK30_GRF_BASE+0x0098
|
||||
#define GRF_GPIO3D_IOMUX RK30_GRF_BASE+0x009c
|
||||
#define GRF_SOC_CON0 0x00a0
|
||||
#define GRF_SOC_CON1 0x00a4
|
||||
#define GRF_SOC_CON2 0x00a8
|
||||
#define GRF_SOC_STATUS0 0x00ac
|
||||
#define GRF_DMAC1_CON0 0x00b0
|
||||
#define GRF_DMAC1_CON1 0x00b4
|
||||
#define GRF_DMAC1_CON2 0x00b8
|
||||
#define GRF_DMAC2_CON0 0x00bc
|
||||
#define GRF_DMAC2_CON1 0x00c0
|
||||
#define GRF_DMAC2_CON2 0x00c4
|
||||
#define GRF_DMAC2_CON3 0x00c8
|
||||
#define GRF_IO_CON0 0x00f4
|
||||
#define GRF_IO_CON1 0x00f8
|
||||
#define GRF_IO_CON2 0x00fc
|
||||
#define GRF_IO_CON3 0x0100
|
||||
#define GRF_IO_CON4 0x0104
|
||||
#define GRF_UOC0_CON0 0x010c
|
||||
#define GRF_UOC0_CON1 0x0110
|
||||
#define GRF_UOC0_CON2 0x0114
|
||||
#define GRF_UOC0_CON3 0x0118
|
||||
#define GRF_UOC1_CON0 0x011c
|
||||
#define GRF_UOC1_CON1 0x0120
|
||||
#define GRF_UOC1_CON2 0x0124
|
||||
#define GRF_UOC1_CON3 0x0128
|
||||
#define GRF_UOC2_CON0 0x012c
|
||||
#define GRF_UOC2_CON1 0x0130
|
||||
#define GRF_UOC3_CON0 0x0138
|
||||
#define GRF_UOC3_CON1 0x013c
|
||||
#define GRF_HSIC_STAT 0x0140
|
||||
#define GRF_DDRC_CON0 0x00ec
|
||||
#define GRF_DDRC_STAT 0x00f0
|
||||
#define GRF_OS_REG0 0x0144
|
||||
#define GRF_OS_REG1 0x0148
|
||||
#define GRF_OS_REG2 0x014c
|
||||
#define GRF_OS_REG3 0x0150
|
||||
#define GRF_OS_REG4 0x0154
|
||||
#define GRF_OS_REG5 0x0158
|
||||
#define GRF_OS_REG6 0x015c
|
||||
#define GRF_OS_REG7 0x0160
|
||||
|
||||
//GPIO0C
|
||||
#define GPIO0C0_FLASHDATA8_NAME "gpio0c0_flashdata8_name"
|
||||
#define GPIO0C1_FLASHDATA9_NAME "gpio0c1_flashdata9_name"
|
||||
#define GPIO0C2_FLASHDATA10_NAME "gpio0c2_flashdata10_name"
|
||||
#define GPIO0C3_FLASHDATA11_NAME "gpio0c3_flashdata11_name"
|
||||
#define GPIO0C4_FLASHDATA12_NAME "gpio0c4_flashdata12_name"
|
||||
#define GPIO0C5_FLASHDATA13_NAME "gpio0c5_flashdata13_name"
|
||||
#define GPIO0C6_FLASHDATA14_NAME "gpio0c6_flashdata14_name"
|
||||
#define GPIO0C7_FLASHDATA15_NAME "gpio0c7_flashdata15_name"
|
||||
|
||||
//GPIO0D
|
||||
#define GPIO0D0_FLASHDQS_EMMCCLKOUT_NAME "gpio0d0_flashdqs_emmcclkout_name"
|
||||
#define GPIO0D1_FLASHCSN1_NAME "gpio0d1_flashcsn1_name"
|
||||
#define GPIO0D2_FLASHCSN2_EMMCCMD_NAME "gpio0d2_flashcsn2_emmccmd_name"
|
||||
#define GPIO0D3_FLASHCSN3_EMMCRSTNOUT_NAME "gpio0d3_flashcsn3_emmcrstnout_name"
|
||||
#define GPIO0D4_SPI1RXD_NAME "gpio0d4_spi1rxd_name"
|
||||
#define GPIO0D5_SPI1TXD_NAME "gpio0d5_spi1txd_name"
|
||||
#define GPIO0D6_SPI1CLK_NAME "gpio0d6_spi1clk_name"
|
||||
#define GPIO0D7_SPI1CSN0_NAME "gpio0d7_spi1csn0_name"
|
||||
|
||||
//GPIO1A
|
||||
#define GPIO1A0_UART0SIN_NAME "gpio1a0_uart0sin_name"
|
||||
#define GPIO1A1_UART0SOUT_NAME "gpio1a1_uart0sout_name"
|
||||
#define GPIO1A2_UART0CTSN_NAME "gpio1a2_uart0ctsn_name"
|
||||
#define GPIO1A3_UART0RTSN_NAME "gpio1a3_uart0rtsn_name"
|
||||
#define GPIO1A4_UART1SIN_SPI0RXD_NAME "gpio1a4_uart1sin_spi0rxd_name"
|
||||
#define GPIO1A5_UART1SOUT_SPI0TXD_NAME "gpio1a5_uart1sout_spi0txd_name"
|
||||
#define GPIO1A6_UART1CTSN_SPI0CLK_NAME "gpio1a6_uart1ctsn_spi0clk_name"
|
||||
#define GPIO1A7_UART1RTSN_SPI0CSN0_NAME "gpio1a7_uart1rtsn_spi0csn0_name"
|
||||
|
||||
//GPIO1B
|
||||
#define GPIO1B0_UART2SIN_JTAGTDI_NAME "gpio1b0_uart2sin_jtagtdi_name"
|
||||
#define GPIO1B1_UART2SOUT_JTAGTDO_NAME "gpio1b1_uart2sout_jtagtdo_name"
|
||||
#define GPIO1B2_UART3SIN_GPSMAG_NAME "gpio1b2_uart3sin_gpsmag_name"
|
||||
#define GPIO1B3_UART3SOUT_GPSSIG_NAME "gpio1b3_uart3sout_gpssig_name"
|
||||
#define GPIO1B4_UART3CTSN_GPSRFCLK_NAME "gpio1b4_uart3ctsn_gpsrfclk_name"
|
||||
#define GPIO1B5_UART3RTSN_NAME "gpio1b5_uart3rtsn_name"
|
||||
#define GPIO1B6_SPDIFTX_SPI1CSN1_NAME "gpio1b6_spdiftx_spi1csn1_name"
|
||||
#define GPIO1B7_SPI0CSN1_NAME "gpio1b7_spi0csn1_name"
|
||||
|
||||
//GPIO1C
|
||||
#define GPIO1C0_I2SCLK_NAME "gpio1c0_i2sclk_name"
|
||||
#define GPIO1C1_I2SSCLK_NAME "gpio1c1_i2ssclk_name"
|
||||
#define GPIO1C2_I2SLRCLKRX_NAME "gpio1c2_i2slrclkrx_name"
|
||||
#define GPIO1C3_I2SLRCLKTX_NAME "gpio1c3_i2slrclktx_name"
|
||||
#define GPIO1C4_I2SSDI_NAME "gpio1c4_i2ssdi_name"
|
||||
#define GPIO1C5_I2SSDO_NAME "gpio1c5_i2ssdo_name"
|
||||
|
||||
//GPIO1D
|
||||
#define GPIO1D0_I2C0SDA_NAME "gpio1d0_i2c0sda_name"
|
||||
#define GPIO1D1_I2C0SCL_NAME "gpio1d1_i2c0scl_name"
|
||||
#define GPIO1D2_I2C1SDA_NAME "gpio1d2_i2c1sda_name"
|
||||
#define GPIO1D3_I2C1SCL_NAME "gpio1d3_i2c1scl_name"
|
||||
#define GPIO1D4_I2C2SDA_NAME "gpio1d4_i2c2sda_name"
|
||||
#define GPIO1D5_I2C2SCL_NAME "gpio1d5_i2c2scl_name"
|
||||
#define GPIO1D6_I2C4SDA_NAME "gpio1d6_i2c4sda_name"
|
||||
#define GPIO1D7_I2C4SCL_NAME "gpio1d7_i2c4scl_name"
|
||||
|
||||
//GPIO2A
|
||||
#define GPIO2A0_LCDC1DATA0_SMCDATA0_TRACEDATA0_NAME "gpio2a0_lcdc1data0_smcdata0_tracedata0_name"
|
||||
#define GPIO2A1_LCDC1DATA1_SMCDATA1_TRACEDATA1_NAME "gpio2a1_lcdc1data1_smcdata1_tracedata1_name"
|
||||
#define GPIO2A2_LCDC1DATA2_SMCDATA2_TRACEDATA2_NAME "gpio2a2_lcdc1data2_smcdata2_tracedata2_name"
|
||||
#define GPIO2A3_LCDC1DATA3_SMCDATA3_TRACEDATA3_NAME "gpio2a3_lcdc1data3_smcdata3_tracedata3_name"
|
||||
#define GPIO2A4_LCDC1DATA4_SMCDATA4_TRACEDATA4_NAME "gpio2a4_lcdc1data4_smcdata4_tracedata4_name"
|
||||
#define GPIO2A5_LCDC1DATA5_SMCDATA5_TRACEDATA5_NAME "gpio2a5_lcdc1data5_smcdata5_tracedata5_name"
|
||||
#define GPIO2A6_LCDC1DATA6_SMCDATA6_TRACEDATA6_NAME "gpio2a6_lcdc1data6_smcdata6_tracedata6_name"
|
||||
#define GPIO2A7_LCDC1DATA7_SMCDATA7_TRACEDATA7_NAME "gpio2a7_lcdc1data7_smcdata7_tracedata7_name"
|
||||
|
||||
//GPIO2B
|
||||
#define GPIO2B0_LCDC1DATA8_SMCDATA8_TRACEDATA8_NAME "gpio2b0_lcdc1data8_smcdata8_tracedata8_name"
|
||||
#define GPIO2B1_LCDC1DATA9_SMCDATA9_TRACEDATA9_NAME "gpio2b1_lcdc1data9_smcdata9_tracedata9_name"
|
||||
#define GPIO2B2_LCDC1DATA10_SMCDATA10_TRACEDATA10_NAME "gpio2b2_lcdc1data10_smcdata10_tracedata10_name"
|
||||
#define GPIO2B3_LCDC1DATA11_SMCDATA11_TRACEDATA11_NAME "gpio2b3_lcdc1data11_smcdata11_tracedata11_name"
|
||||
#define GPIO2B4_LCDC1DATA12_SMCDATA12_TRACEDATA12_NAME "gpio2b4_lcdc1data12_smcdata12_tracedata12_name"
|
||||
#define GPIO2B5_LCDC1DATA13_SMCDATA13_TRACEDATA13_NAME "gpio2b5_lcdc1data13_smcdata13_tracedata13_name"
|
||||
#define GPIO2B6_LCDC1DATA14_SMCDATA14_TRACEDATA14_NAME "gpio2b6_lcdc1data14_smcdata14_tracedata14_name"
|
||||
#define GPIO2B7_LCDC1DATA15_SMCDATA15_TRACEDATA15_NAME "gpio2b7_lcdc1data15_smcdata15_tracedata15_name"
|
||||
|
||||
//GPIO2C
|
||||
#define GPIO2C0_LCDC1DATA16_SMCADDR0_TRACECLK_NAME "gpio2c0_lcdc1data16_smcaddr0_traceclk_name"
|
||||
#define GPIO2C1_LCDC1DATA17_SMCADDR1_TRACECTL_NAME "gpio2c1_lcdc1data17_smcaddr1_tracectl_name"
|
||||
#define GPIO2C2_LCDC1DATA18_SMCADDR2_NAME "gpio2c2_lcdc1data18_smcaddr2_name"
|
||||
#define GPIO2C3_LCDC1DATA19_SMCADDR3_NAME "gpio2c3_lcdc1data19_smcaddr3_name"
|
||||
#define GPIO2C4_LCDC1DATA20_SMCADDR4_NAME "gpio2c4_lcdc1data20_smcaddr4_name"
|
||||
#define GPIO2C5_LCDC1DATA21_SMCADDR5_NAME "gpio2c5_lcdc1data21_smcaddr5_name"
|
||||
#define GPIO2C6_LCDC1DATA22_SMCADDR6_NAME "gpio2c6_lcdc1data22_smcaddr6_name"
|
||||
#define GPIO2C7_LCDC1DATA23_SMCADDR7_NAME "gpio2c7_lcdc1data23_smcaddr7_name"
|
||||
|
||||
//GPIO2D
|
||||
#define GPIO2D0_LCDC1DCLK_SMCCSN0_NAME "gpio2d0_lcdc1dclk_smccsn0_name"
|
||||
#define GPIO2D1_LCDC1DEN_SMCWEN_NAME "gpio2d1_lcdc1den_smcwen_name"
|
||||
#define GPIO2D2_LCDC1HSYNC_SMCOEN_NAME "gpio2d2_lcdc1hsync_smcoen_name"
|
||||
#define GPIO2D3_LCDC1VSYNC_SMCADVN_NAME "gpio2d3_lcdc1vsync_smcadvn_name"
|
||||
#define GPIO2D4_SMCBLSN0_NAME "gpio2d4_smcblsn0_name"
|
||||
#define GPIO2D5_SMCBLSN1_NAME "gpio2d5_smcblsn1_name"
|
||||
#define GPIO2D6_SMCCSN1_NAME "gpio2d6_smccsn1_name"
|
||||
#define GPIO2D7_TESTCLOCKOUT_NAME "gpio2d7_testclockout_name"
|
||||
|
||||
//GPIO3A
|
||||
#define GPIO3A0_SDMMC0RSTNOUT_NAME "gpio3a0_sdmmc0rstnout_name"
|
||||
#define GPIO3A1_SDMMC0PWREN_NAME "gpio3a1_sdmmc0pwren_name"
|
||||
#define GPIO3A2_SDMMC0CLKOUT_NAME "gpio3a2_sdmmc0clkout_name"
|
||||
#define GPIO3A3_SDMMC0CMD_NAME "gpio3a3_sdmmc0cmd_name"
|
||||
#define GPIO3A4_SDMMC0DATA0_NAME "gpio3a4_sdmmc0data0_name"
|
||||
#define GPIO3A5_SDMMC0DATA1_NAME "gpio3a5_sdmmc0data1_name"
|
||||
#define GPIO3A6_SDMMC0DATA2_NAME "gpio3a6_sdmmc0data2_name"
|
||||
#define GPIO3A7_SDMMC0DATA3_NAME "gpio3a7_sdmmc0data3_name"
|
||||
|
||||
//GPIO3B
|
||||
#define GPIO3B0_SDMMC0DETECTN_NAME "gpio3b0_sdmmc0detectn_name"
|
||||
#define GPIO3B1_SDMMC0WRITEPRT_NAME "gpio3b1_sdmmc0writeprt_name"
|
||||
#define GPIO3B3_CIFCLKOUT_NAME "gpio3b3_cifclkout_name"
|
||||
#define GPIO3B4_CIFDATA0_HSADCDATA8_NAME "gpio3b4_cifdata0_hsadcdata8_name"
|
||||
#define GPIO3B5_CIFDATA1_HSADCDATA9_NAME "gpio3b5_cifdata1_hsadcdata9_name"
|
||||
#define GPIO3B6_CIFDATA10_I2C3SDA_NAME "gpio3b6_cifdata10_i2c3sda_name"
|
||||
#define GPIO3B7_CIFDATA11_I2C3SCL_NAME "gpio3b7_cifdata11_i2c3scl_name"
|
||||
|
||||
//GPIO3C
|
||||
#define GPIO3C0_SDMMC1CMD_RMIITXEN_NAME "gpio3c0_sdmmc1cmd_rmiitxen_name"
|
||||
#define GPIO3C1_SDMMC1DATA0_RMIITXD1_NAME "gpio3c1_sdmmc1data0_rmiitxd1_name"
|
||||
#define GPIO3C2_SDMMC1DATA1_RMIITXD0_NAME "gpio3c2_sdmmc1data1_rmiitxd0_name"
|
||||
#define GPIO3C3_SDMMC1DATA2_RMIIRXD0_NAME "gpio3c3_sdmmc1data2_rmiirxd0_name"
|
||||
#define GPIO3C4_SDMMC1DATA3_RMIIRXD1_NAME "gpio3c4_sdmmc1data3_rmiirxd1_name"
|
||||
#define GPIO3C5_SDMMC1CLKOUT_RMIICLKOUT_RMIICLKIN_NAME "gpio3c5_sdmmc1clkout_rmiiclkout_rmiiclkin_name"
|
||||
#define GPIO3C6_SDMMC1DETECTN_RMIIRXERR_NAME "gpio3c6_sdmmc1detectn_rmiirxerr_name"
|
||||
#define GPIO3C7_SDMMC1WRITEPRT_RMIICRS_NAME "gpio3c7_sdmmc1writeprt_rmiicrs_name"
|
||||
|
||||
//GPIO3D
|
||||
#define GPIO3D0_SDMMC1PWREN_MIIMD_NAME "gpio3d0_sdmmc1pwren_miimd_name"
|
||||
#define GPIO3D1_SDMMC1BACKENDPWR_MIIMDCLK_NAME "gpio3d1_sdmmc1backendpwr_miimdclk_name"
|
||||
#define GPIO3D2_SDMMC1INTN_NAME "gpio3d2_sdmmc1intn_name"
|
||||
#define GPIO3D3_PWM0_NAME "gpio3d3_pwm0_name"
|
||||
#define GPIO3D4_PWM1_JTAGTRSTN_NAME "gpio3d4_pwm1_jtagtrstn_name"
|
||||
#define GPIO3D5_PWM2_JTAGTCK_OTGDRVVBUS_NAME "gpio3d5_pwm2_jtagtck_otgdrvvbus_name"
|
||||
#define GPIO3D6_PWM3_JTAGTMS_HOSTDRVVBUS_NAME "gpio3d6_pwm3_jtagtms_hostdrvvbus_name"
|
||||
@@ -4,7 +4,12 @@
|
||||
#include <linux/init.h>
|
||||
#include <mach/iomux-rk30.h>
|
||||
#if defined(CONFIG_ARCH_RK3066B)
|
||||
#include <mach/iomux-rk3066b.h>
|
||||
|
||||
#include <mach/grf-rk3066b.h>
|
||||
#define rk29_mux_api_set(name, mode) iomux_set(mode)
|
||||
#define rk30_mux_api_set(name, mode) iomux_set(mode)
|
||||
#define rk30_iomux_init() iomux_init()
|
||||
|
||||
#elif defined(CONFIG_ARCH_RK30)
|
||||
//GPIO0A
|
||||
#define GPIO0A_GPIO0A7 0
|
||||
@@ -788,8 +793,6 @@
|
||||
//GPIO6B
|
||||
#define GPIO6B7_TESTCLOCKOUT_NAME "gpio6b7_testclockout_name"
|
||||
|
||||
#endif
|
||||
|
||||
#define DEFAULT 0
|
||||
#define INITIAL 1
|
||||
|
||||
@@ -820,3 +823,5 @@ extern void rk30_mux_api_set(char *name, unsigned int mode);
|
||||
extern int rk30_mux_api_get(char *name);
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -22,9 +22,6 @@
|
||||
|
||||
//#define IOMUX_DBG
|
||||
|
||||
#if defined(CONFIG_ARCH_RK3066B)
|
||||
#include "iomux-rk3066b.c"
|
||||
#else
|
||||
static struct mux_config rk30_muxs[] = {
|
||||
/*
|
||||
* description mux mode mux mux
|
||||
@@ -234,7 +231,6 @@ MUX_CFG(GPIO4D0_SMCDATA8_TRACEDATA8_NAME, GPIO4D, 0, 2, 0, DEFAULT)
|
||||
MUX_CFG(GPIO6B7_TESTCLOCKOUT_NAME, GPIO6B, 14, 1, 0, DEFAULT)
|
||||
|
||||
};
|
||||
#endif
|
||||
|
||||
|
||||
void rk30_mux_set(struct mux_config *cfg)
|
||||
|
||||
Reference in New Issue
Block a user