diff --git a/arch/arm/boot/dts/rk3506.dtsi b/arch/arm/boot/dts/rk3506.dtsi
index 27fe997f7505..a6d1a6ba2fe6 100644
--- a/arch/arm/boot/dts/rk3506.dtsi
+++ b/arch/arm/boot/dts/rk3506.dtsi
@@ -22,6 +22,9 @@
 		gpio2 = &gpio2;
 		gpio3 = &gpio3;
 		gpio4 = &gpio4;
+		i2c0 = &i2c0;
+		i2c1 = &i2c1;
+		i2c2 = &i2c2;
 		serial0 = &uart0;
 		serial1 = &uart1;
 		serial2 = &uart2;
@@ -149,6 +152,39 @@
 		arm,pl330-periph-burst;
 	};
 
+	i2c0: i2c@ff040000 {
+		compatible = "rockchip,rk3506-i2c", "rockchip,rk3399-i2c";
+		reg = <0xff040000 0x1000>;
+		interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru CLK_I2C0>, <&cru PCLK_I2C0>;
+		clock-names = "i2c", "pclk";
+		status = "disabled";
+	};
+
+	i2c1: i2c@ff050000 {
+		compatible = "rockchip,rk3506-i2c", "rockchip,rk3399-i2c";
+		reg = <0xff050000 0x1000>;
+		interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru CLK_I2C1>, <&cru PCLK_I2C1>;
+		clock-names = "i2c", "pclk";
+		status = "disabled";
+	};
+
+	i2c2: i2c@ff060000 {
+		compatible = "rockchip,rk3506-i2c", "rockchip,rk3399-i2c";
+		reg = <0xff060000 0x1000>;
+		interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru CLK_I2C2>, <&cru PCLK_I2C2>;
+		clock-names = "i2c", "pclk";
+		status = "disabled";
+	};
+
 	uart0: serial@ff0a0000 {
 		compatible = "rockchip,rk3506-uart", "snps,dw-apb-uart";
 		reg = <0xff0a0000 0x100>;