From 56f0ad9953fd0e34a11efbd0b735ac9fb05b4aa2 Mon Sep 17 00:00:00 2001 From: Wyon Bi Date: Fri, 18 Nov 2022 01:11:59 +0000 Subject: [PATCH] drm/bridge: analogix_dp: Fix bpp value in analogix_dp_bandwidth_ok() Signed-off-by: Wyon Bi Change-Id: I38fc9c1d95966204c89afffe15ce551ae8c3f62f --- drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c index bf41d8244fb4..fa0fb7bb3458 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c @@ -56,8 +56,16 @@ static bool analogix_dp_bandwidth_ok(struct analogix_dp_device *dp, const struct drm_display_mode *mode, unsigned int rate, unsigned int lanes) { + const struct drm_display_info *info; u32 max_bw, req_bw, bpp = 24; + if (dp->plat_data->skip_connector) + return true; + + info = &dp->connector.display_info; + if (info->bpc) + bpp = 3 * info->bpc; + req_bw = mode->clock * bpp / 8; max_bw = lanes * rate; if (req_bw > max_bw)