From 583d67f9993a38c49437bb66b007807b34be3d60 Mon Sep 17 00:00:00 2001
From: Zhen Chen <chenzhen@rock-chips.com>
Date: Tue, 16 Nov 2021 19:08:48 +0800
Subject: [PATCH] MALI: bifrost: rk: add definition and implementation of
 CLK_RATE_TRACE_OPS

Picked from ./platform/devicetree/.

This makes GPU utilisation info available and resolve the warning log below:
[   19.641700][   T83] WARNING: CPU: 0 PID: 83 at drivers/gpu/arm/bifrost/csf/ipa_control/mali_kbase_csf_ipa_control.c:239 kbase_ipa_control_handle_gpu_power_off+0x128/0x198

Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
Change-Id: I7ce8d0f52d6340659b2c9ca9692c48043e1060c1
---
 .../platform/rk/mali_kbase_config_platform.h  |  2 +
 .../platform/rk/mali_kbase_config_rk.c        | 49 +++++++++++++++++++
 2 files changed, 51 insertions(+)

diff --git a/drivers/gpu/arm/bifrost/platform/rk/mali_kbase_config_platform.h b/drivers/gpu/arm/bifrost/platform/rk/mali_kbase_config_platform.h
index 07c5b6f8a760..24733bfa8537 100755
--- a/drivers/gpu/arm/bifrost/platform/rk/mali_kbase_config_platform.h
+++ b/drivers/gpu/arm/bifrost/platform/rk/mali_kbase_config_platform.h
@@ -86,3 +86,5 @@ extern struct kbase_platform_funcs_conf platform_funcs;
  */
 #define SECURE_CALLBACKS (NULL)
 
+#define CLK_RATE_TRACE_OPS (&clk_rate_trace_ops)
+extern struct kbase_clk_rate_trace_op_conf clk_rate_trace_ops;
diff --git a/drivers/gpu/arm/bifrost/platform/rk/mali_kbase_config_rk.c b/drivers/gpu/arm/bifrost/platform/rk/mali_kbase_config_rk.c
index e73ef450d135..4495aebb1ef3 100755
--- a/drivers/gpu/arm/bifrost/platform/rk/mali_kbase_config_rk.c
+++ b/drivers/gpu/arm/bifrost/platform/rk/mali_kbase_config_rk.c
@@ -16,6 +16,11 @@
 #include <backend/gpu/mali_kbase_pm_internal.h>
 #include <backend/gpu/mali_kbase_pm_defs.h>
 
+#if MALI_USE_CSF
+#include <asm/arch_timer.h>
+#endif
+
+#include <linux/clk.h>
 #include <linux/pm_runtime.h>
 #include <linux/suspend.h>
 #include <linux/of.h>
@@ -457,3 +462,47 @@ int kbase_platform_rk_init_opp_table(struct kbase_device *kbdev)
 	return rockchip_init_opp_table(kbdev->dev, NULL,
 				       "gpu_leakage", "mali");
 }
+
+/*---------------------------------------------------------------------------*/
+
+static void *enumerate_gpu_clk(struct kbase_device *kbdev,
+		unsigned int index)
+{
+	if (index >= kbdev->nr_clocks)
+		return NULL;
+
+	return kbdev->clocks[index];
+}
+
+static unsigned long get_gpu_clk_rate(struct kbase_device *kbdev,
+		void *gpu_clk_handle)
+{
+	return clk_get_rate((struct clk *)gpu_clk_handle);
+}
+
+static int gpu_clk_notifier_register(struct kbase_device *kbdev,
+		void *gpu_clk_handle, struct notifier_block *nb)
+{
+	compiletime_assert(offsetof(struct clk_notifier_data, clk) ==
+		offsetof(struct kbase_gpu_clk_notifier_data, gpu_clk_handle),
+		"mismatch in the offset of clk member");
+
+	compiletime_assert(sizeof(((struct clk_notifier_data *)0)->clk) ==
+	     sizeof(((struct kbase_gpu_clk_notifier_data *)0)->gpu_clk_handle),
+	     "mismatch in the size of clk member");
+
+	return clk_notifier_register((struct clk *)gpu_clk_handle, nb);
+}
+
+static void gpu_clk_notifier_unregister(struct kbase_device *kbdev,
+		void *gpu_clk_handle, struct notifier_block *nb)
+{
+	clk_notifier_unregister((struct clk *)gpu_clk_handle, nb);
+}
+
+struct kbase_clk_rate_trace_op_conf clk_rate_trace_ops = {
+	.get_gpu_clk_rate = get_gpu_clk_rate,
+	.enumerate_gpu_clk = enumerate_gpu_clk,
+	.gpu_clk_notifier_register = gpu_clk_notifier_register,
+	.gpu_clk_notifier_unregister = gpu_clk_notifier_unregister,
+};