From 58e328773ba70160c004fb080760cd3b00545390 Mon Sep 17 00:00:00 2001 From: Luke Go Date: Thu, 26 Mar 2020 17:20:29 +0900 Subject: [PATCH] ODROID-C4: arm64/dts: fix SPI cs_1 pin after H/W (rev.0.4) Signed-off-by: femto Change-Id: Icf46202de22792e8c3bd21cbb8ec43c6c69758db --- arch/arm64/boot/dts/amlogic/meson64_odroidc4.dts | 10 +++++++++- .../arm64/boot/dts/amlogic/mesonsm1_odroid_common.dtsi | 8 -------- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/amlogic/meson64_odroidc4.dts b/arch/arm64/boot/dts/amlogic/meson64_odroidc4.dts index dbc6b1b1c10c..fdee42c435ad 100644 --- a/arch/arm64/boot/dts/amlogic/meson64_odroidc4.dts +++ b/arch/arm64/boot/dts/amlogic/meson64_odroidc4.dts @@ -759,6 +759,14 @@ status = "okay"; }; +&usb3_phy_v2 { + status = "okay"; + portnum = <1>; + otg = <1>; + gpio-vbus-power = "GPIOAO_2"; + gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>; +}; + &reboot { sd_volsw_gpio = <&gpio_ao GPIOAO_6 GPIO_ACTIVE_HIGH>; sd_power_gpio = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>; @@ -840,7 +848,7 @@ num_chipselect = <2>; cs-gpios = <&gpio GPIOX_10 GPIO_ACTIVE_LOW>, - <&gpio GPIOA_4 GPIO_ACTIVE_LOW>; + <&gpio GPIOH_6 GPIO_ACTIVE_LOW>; can0: can@0 { compatible = "microchip,mcp2515"; diff --git a/arch/arm64/boot/dts/amlogic/mesonsm1_odroid_common.dtsi b/arch/arm64/boot/dts/amlogic/mesonsm1_odroid_common.dtsi index 74a46210fd66..77d46b2aa6e9 100644 --- a/arch/arm64/boot/dts/amlogic/mesonsm1_odroid_common.dtsi +++ b/arch/arm64/boot/dts/amlogic/mesonsm1_odroid_common.dtsi @@ -189,14 +189,6 @@ portnum = <2>; }; -&usb3_phy_v2 { - status = "okay"; - portnum = <1>; - otg = <1>; - gpio-vbus-power = "GPIOH_6"; - gpios = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>; -}; - &dwc3 { status = "okay"; };