From 59200fb8bf652c67b058b60e5c3b7349c513e170 Mon Sep 17 00:00:00 2001 From: William Wu Date: Wed, 25 Jun 2025 09:20:36 +0800 Subject: [PATCH] phy: rockchip: naneng-combphy: Tuning usb3 Tx for rv1126b This patch tuning rv1126b usb3 Tx signal for compliance far end test. 1. Set Tx Full Txswing and Txmargin 1200mV. 2. Set Tx De-emphasis -6dB. Change-Id: I641e806a7dfc6f3f7d3b280543950c19410f733e Signed-off-by: William Wu --- drivers/phy/rockchip/phy-rockchip-naneng-combphy.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c index d1a89be9d333..866b730cc521 100644 --- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c +++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c @@ -1487,6 +1487,10 @@ static int rv1126b_combphy_cfg(struct rockchip_combphy_priv *priv) /* Set Rx squelch input filler bandwidth */ writel(0x0e, priv->mmio + (0x14 << 2)); + /* Set Full Txswing and Txmargin 1200mV and -6dB De-emphasis */ + regmap_write(priv->phy_grf, 0x1800c, GENMASK(18, 16) | 0x0007); + regmap_write(priv->phy_grf, 0x18004, GENMASK(26, 21) | 0x0100); + rockchip_combphy_param_write(priv->phy_grf, &cfg->pipe_sel_usb, true); rockchip_combphy_param_write(priv->phy_grf, &cfg->pipe_txcomp_sel, false); rockchip_combphy_param_write(priv->phy_grf, &cfg->pipe_txelec_sel, false);