diff --git a/drivers/mfd/rk808.c b/drivers/mfd/rk808.c index 83488c7ce62f..24e34932f498 100644 --- a/drivers/mfd/rk808.c +++ b/drivers/mfd/rk808.c @@ -104,6 +104,8 @@ static bool rk818_is_volatile_reg(struct device *dev, unsigned int reg) case RK808_INT_STS_REG2: case RK808_INT_STS_MSK_REG1: case RK808_INT_STS_MSK_REG2: + case RK816_INT_STS_REG1: + case RK816_INT_STS_MSK_REG1: case RK818_SUP_STS_REG ... RK818_SAVE_DATA19: return true; } @@ -135,6 +137,14 @@ static const struct regmap_config rk808_regmap_config = { .volatile_reg = rk808_is_volatile_reg, }; +static const struct regmap_config rk816_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = RK816_DATA18_REG, + .cache_type = REGCACHE_RBTREE, + .volatile_reg = rk818_is_volatile_reg, +}; + static const struct regmap_config rk817_regmap_config = { .reg_bits = 8, .val_bits = 8, @@ -147,6 +157,10 @@ static struct resource rtc_resources[] = { DEFINE_RES_IRQ(RK808_IRQ_RTC_ALARM), }; +static struct resource rk816_rtc_resources[] = { + DEFINE_RES_IRQ(RK816_IRQ_RTC_ALARM), +}; + static struct resource rk817_rtc_resources[] = { DEFINE_RES_IRQ(RK817_IRQ_RTC_ALARM), }; @@ -156,6 +170,11 @@ static struct resource rk805_key_resources[] = { DEFINE_RES_IRQ(RK805_IRQ_PWRON_RISE), }; +static struct resource rk816_pwrkey_resources[] = { + DEFINE_RES_IRQ(RK816_IRQ_PWRON_FALL), + DEFINE_RES_IRQ(RK816_IRQ_PWRON_RISE), +}; + static struct resource rk817_pwrkey_resources[] = { DEFINE_RES_IRQ(RK817_IRQ_PWRON_FALL), DEFINE_RES_IRQ(RK817_IRQ_PWRON_RISE), @@ -186,6 +205,23 @@ static const struct mfd_cell rk808s[] = { }, }; +static const struct mfd_cell rk816s[] = { + { .name = "rk808-clkout", }, + { .name = "rk808-regulator", }, + { .name = "rk805-pinctrl", }, + { .name = "rk816-battery", .of_compatible = "rk816-battery", }, + { + .name = "rk805-pwrkey", + .num_resources = ARRAY_SIZE(rk816_pwrkey_resources), + .resources = &rk816_pwrkey_resources[0], + }, + { + .name = "rk808-rtc", + .num_resources = ARRAY_SIZE(rk816_rtc_resources), + .resources = &rk816_rtc_resources[0], + }, +}; + static const struct mfd_cell rk817s[] = { { .name = "rk808-clkout",}, { .name = "rk808-regulator",}, @@ -231,6 +267,33 @@ static const struct rk808_reg_data rk808_pre_init_reg[] = { VB_LO_SEL_3500MV }, }; +static const struct rk808_reg_data rk816_pre_init_reg[] = { + /* buck4 Max ILMIT*/ + { RK816_BUCK4_CONFIG_REG, REG_WRITE_MSK, BUCK4_MAX_ILIMIT }, + /* hotdie temperature: 105c*/ + { RK816_THERMAL_REG, REG_WRITE_MSK, TEMP105C }, + /* set buck 12.5mv/us */ + { RK816_BUCK1_CONFIG_REG, BUCK_RATE_MSK, BUCK_RATE_12_5MV_US }, + { RK816_BUCK2_CONFIG_REG, BUCK_RATE_MSK, BUCK_RATE_12_5MV_US }, + /* enable RTC_PERIOD & RTC_ALARM int */ + { RK816_INT_STS_MSK_REG2, REG_WRITE_MSK, RTC_PERIOD_ALARM_INT_EN }, + /* set bat 3.0 low and act shutdown */ + { RK816_VB_MON_REG, VBAT_LOW_VOL_MASK | VBAT_LOW_ACT_MASK, + RK816_VBAT_LOW_3V0 | EN_VABT_LOW_SHUT_DOWN }, + /* enable PWRON rising/faling int */ + { RK816_INT_STS_MSK_REG1, REG_WRITE_MSK, RK816_PWRON_FALL_RISE_INT_EN }, + /* enable PLUG IN/OUT int */ + { RK816_INT_STS_MSK_REG3, REG_WRITE_MSK, PLUGIN_OUT_INT_EN }, + /* clear int flags */ + { RK816_INT_STS_REG1, REG_WRITE_MSK, ALL_INT_FLAGS_ST }, + { RK816_INT_STS_REG2, REG_WRITE_MSK, ALL_INT_FLAGS_ST }, + { RK816_INT_STS_REG3, REG_WRITE_MSK, ALL_INT_FLAGS_ST }, + { RK816_DCDC_EN_REG2, BOOST_EN_MASK, BOOST_DISABLE }, + /* set write mask bit 1, otherwise 'is_enabled()' get wrong status */ + { RK816_LDO_EN_REG1, REGS_WMSK, REGS_WMSK }, + { RK816_LDO_EN_REG2, REGS_WMSK, REGS_WMSK }, +}; + static const struct rk808_reg_data rk817_pre_init_reg[] = { {RK817_RTC_CTRL_REG, RTC_STOP, RTC_STOP}, {RK817_GPIO_INT_CFG, RK817_INT_POL_MSK, RK817_INT_POL_L}, @@ -333,6 +396,46 @@ static const struct regmap_irq rk808_irqs[] = { }, }; +static const struct regmap_irq rk816_irqs[] = { + /* INT_STS */ + [RK816_IRQ_PWRON_FALL] = { + .mask = RK816_IRQ_PWRON_FALL_MSK, + .reg_offset = 0, + }, + [RK816_IRQ_PWRON_RISE] = { + .mask = RK816_IRQ_PWRON_RISE_MSK, + .reg_offset = 0, + }, + [RK816_IRQ_VB_LOW] = { + .mask = RK816_IRQ_VB_LOW_MSK, + .reg_offset = 1, + }, + [RK816_IRQ_PWRON] = { + .mask = RK816_IRQ_PWRON_MSK, + .reg_offset = 1, + }, + [RK816_IRQ_PWRON_LP] = { + .mask = RK816_IRQ_PWRON_LP_MSK, + .reg_offset = 1, + }, + [RK816_IRQ_HOTDIE] = { + .mask = RK816_IRQ_HOTDIE_MSK, + .reg_offset = 1, + }, + [RK816_IRQ_RTC_ALARM] = { + .mask = RK816_IRQ_RTC_ALARM_MSK, + .reg_offset = 1, + }, + [RK816_IRQ_RTC_PERIOD] = { + .mask = RK816_IRQ_RTC_PERIOD_MSK, + .reg_offset = 1, + }, + [RK816_IRQ_USB_OV] = { + .mask = RK816_IRQ_USB_OV_MSK, + .reg_offset = 1, + }, +}; + static const struct regmap_irq rk818_irqs[] = { /* INT_STS */ [RK818_IRQ_VOUT_LO] = { @@ -453,6 +556,61 @@ static const struct regmap_irq_chip rk808_irq_chip = { .init_ack_masked = true, }; +static const struct regmap_irq rk816_battery_irqs[] = { + /* INT_STS */ + [RK816_IRQ_PLUG_IN] = { + .mask = RK816_IRQ_PLUG_IN_MSK, + .reg_offset = 0, + }, + [RK816_IRQ_PLUG_OUT] = { + .mask = RK816_IRQ_PLUG_OUT_MSK, + .reg_offset = 0, + }, + [RK816_IRQ_CHG_OK] = { + .mask = RK816_IRQ_CHG_OK_MSK, + .reg_offset = 0, + }, + [RK816_IRQ_CHG_TE] = { + .mask = RK816_IRQ_CHG_TE_MSK, + .reg_offset = 0, + }, + [RK816_IRQ_CHG_TS] = { + .mask = RK816_IRQ_CHG_TS_MSK, + .reg_offset = 0, + }, + [RK816_IRQ_CHG_CVTLIM] = { + .mask = RK816_IRQ_CHG_CVTLIM_MSK, + .reg_offset = 0, + }, + [RK816_IRQ_DISCHG_ILIM] = { + .mask = RK816_IRQ_DISCHG_ILIM_MSK, + .reg_offset = 0, + }, +}; + +static struct regmap_irq_chip rk816_irq_chip = { + .name = "rk816", + .irqs = rk816_irqs, + .num_irqs = ARRAY_SIZE(rk816_irqs), + .num_regs = 2, + .irq_reg_stride = 3, + .status_base = RK816_INT_STS_REG1, + .mask_base = RK816_INT_STS_MSK_REG1, + .ack_base = RK816_INT_STS_REG1, + .init_ack_masked = true, +}; + +static struct regmap_irq_chip rk816_battery_irq_chip = { + .name = "rk816_battery", + .irqs = rk816_battery_irqs, + .num_irqs = ARRAY_SIZE(rk816_battery_irqs), + .num_regs = 1, + .status_base = RK816_INT_STS_REG3, + .mask_base = RK816_INT_STS_MSK_REG3, + .ack_base = RK816_INT_STS_REG3, + .init_ack_masked = true, +}; + static struct regmap_irq_chip rk817_irq_chip = { .name = "rk817", .irqs = rk817_irqs, @@ -494,6 +652,10 @@ static void rk808_pm_power_off(void) reg = RK808_DEVCTRL_REG, bit = DEV_OFF_RST; break; + case RK816_ID: + reg = RK816_DEV_CTRL_REG, + bit = DEV_OFF; + break; case RK818_ID: reg = RK818_DEVCTRL_REG; bit = DEV_OFF; @@ -791,6 +953,7 @@ static const struct of_device_id rk808_of_match[] = { { .compatible = "rockchip,rk805" }, { .compatible = "rockchip,rk808" }, { .compatible = "rockchip,rk809" }, + { .compatible = "rockchip,rk816" }, { .compatible = "rockchip,rk817" }, { .compatible = "rockchip,rk818" }, { }, @@ -803,6 +966,7 @@ static int rk808_probe(struct i2c_client *client, struct device_node *np = client->dev.of_node; struct rk808 *rk808; const struct rk808_reg_data *pre_init_reg; + const struct regmap_irq_chip *battery_irq_chip = NULL; const struct mfd_cell *cells; unsigned char pmic_id_msb, pmic_id_lsb; u8 on_source = 0, off_source = 0; @@ -867,6 +1031,17 @@ static int rk808_probe(struct i2c_client *client, cells = rk808s; nr_cells = ARRAY_SIZE(rk808s); break; + case RK816_ID: + rk808->regmap_cfg = &rk816_regmap_config; + rk808->regmap_irq_chip = &rk816_irq_chip; + battery_irq_chip = &rk816_battery_irq_chip; + pre_init_reg = rk816_pre_init_reg; + nr_pre_init_regs = ARRAY_SIZE(rk816_pre_init_reg); + cells = rk816s; + nr_cells = ARRAY_SIZE(rk816s); + on_source = RK816_ON_SOURCE_REG; + off_source = RK816_OFF_SOURCE_REG; + break; case RK818_ID: rk808->regmap_cfg = &rk818_regmap_config; rk808->regmap_irq_chip = &rk818_irq_chip; @@ -961,6 +1136,19 @@ static int rk808_probe(struct i2c_client *client, } } + if (battery_irq_chip) { + ret = regmap_add_irq_chip(rk808->regmap, client->irq, + IRQF_ONESHOT | IRQF_SHARED, -1, + battery_irq_chip, + &rk808->battery_irq_data); + if (ret) { + dev_err(&client->dev, + "Failed to add batterry irq_chip %d\n", ret); + regmap_del_irq_chip(client->irq, rk808->irq_data); + return ret; + } + } + ret = devm_mfd_add_devices(&client->dev, PLATFORM_DEVID_NONE, cells, nr_cells, NULL, 0, regmap_irq_get_domain(rk808->irq_data)); @@ -978,6 +1166,8 @@ static int rk808_probe(struct i2c_client *client, err_irq: regmap_del_irq_chip(client->irq, rk808->irq_data); + if (battery_irq_chip) + regmap_del_irq_chip(client->irq, rk808->battery_irq_data); return ret; } diff --git a/drivers/pinctrl/pinctrl-rk805.c b/drivers/pinctrl/pinctrl-rk805.c index 6c6c94556a24..46e426cf4e20 100644 --- a/drivers/pinctrl/pinctrl-rk805.c +++ b/drivers/pinctrl/pinctrl-rk805.c @@ -78,6 +78,7 @@ struct rk805_pctrl_info { enum rk805_pinmux_option { RK805_PINMUX_GPIO, + RK805_PINMUX_TS, }; enum { @@ -132,6 +133,55 @@ static const struct rk805_pin_config rk805_gpio_cfgs[] = { }, }; +#define RK816_FUN_MASK BIT(2) +#define RK816_VAL_MASK BIT(3) +#define RK816_DIR_MASK BIT(4) + +enum { + RK816_GPIO0, +}; + +/* RK816: gpio/ts */ +static const char *const rk816_gpio_groups[] = { + "gpio0", +}; + +static const struct pinctrl_pin_desc rk816_pins_desc[] = { + PINCTRL_PIN(RK816_GPIO0, "gpio0"), +}; + +static const struct rk805_pin_function rk816_pin_functions[] = { + { + .name = "gpio", + .groups = rk816_gpio_groups, + .ngroups = ARRAY_SIZE(rk816_gpio_groups), + .mux_option = RK805_PINMUX_GPIO, + }, + { + .name = "ts", + .groups = rk816_gpio_groups, + .ngroups = ARRAY_SIZE(rk816_gpio_groups), + .mux_option = RK805_PINMUX_TS, + }, +}; + +static const struct rk805_pin_group rk816_pin_groups[] = { + { + .name = "gpio0", + .pins = { RK816_GPIO0 }, + .npins = 1, + }, +}; + +static struct rk805_pin_config rk816_gpio_cfgs[] = { + { + .reg = RK816_GPIO_IO_POL_REG, + .val_msk = RK816_VAL_MASK, + .fun_msk = RK816_FUN_MASK, + .dir_msk = RK816_DIR_MASK, + }, +}; + enum rk817_pinmux_option { RK817_PINMUX_FUN0 = 0, RK817_PINMUX_FUN1, @@ -323,6 +373,20 @@ static const struct gpio_chip rk805_gpio_chip = { .owner = THIS_MODULE, }; +static struct gpio_chip rk816_gpio_chip = { + .label = "rk816-gpio", + .request = gpiochip_generic_request, + .free = gpiochip_generic_free, + .get_direction = rk805_gpio_get_direction, + .get = rk805_gpio_get, + .set = rk805_gpio_set, + .direction_input = rk805_gpio_direction_input, + .direction_output = rk805_gpio_direction_output, + .can_sleep = true, + .base = -1, + .owner = THIS_MODULE, +}; + static struct gpio_chip rk817_gpio_chip = { .label = "rk817-gpio", .request = gpiochip_generic_request, @@ -421,6 +485,15 @@ static int _rk805_pinctrl_set_mux(struct pinctrl_dev *pctldev, dev_err(pci->dev, "set gpio%d GPIO failed\n", offset); return ret; } + } else if (mux == RK805_PINMUX_TS) { + ret = regmap_update_bits(pci->rk808->regmap, + pci->pin_cfg[offset].reg, + pci->pin_cfg[offset].fun_msk, + 0); + if (ret) { + dev_err(pci->dev, "set gpio%d TS failed\n", offset); + return ret; + } } else { dev_err(pci->dev, "Couldn't find function mux %d\n", mux); return -EINVAL; @@ -460,6 +533,7 @@ static int rk805_pinctrl_set_mux(struct pinctrl_dev *pctldev, switch (pci->rk808->variant) { case RK805_ID: + case RK816_ID: return _rk805_pinctrl_set_mux(pctldev, offset, mux); case RK809_ID: @@ -494,7 +568,25 @@ static int rk805_pmx_gpio_set_direction(struct pinctrl_dev *pctldev, return ret; } +static int rk805_pinctrl_gpio_request_enable(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range, + unsigned int offset) +{ + struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); + + /* switch to gpio function */ + switch (pci->rk808->variant) { + case RK805_ID: + case RK816_ID: + return _rk805_pinctrl_set_mux(pctldev, offset, + RK805_PINMUX_GPIO); + default: + return 0; + } +} + static const struct pinmux_ops rk805_pinmux_ops = { + .gpio_request_enable = rk805_pinctrl_gpio_request_enable, .get_functions_count = rk805_pinctrl_get_funcs_count, .get_function_name = rk805_pinctrl_get_func_name, .get_function_groups = rk805_pinctrl_get_func_groups, @@ -511,6 +603,7 @@ static int rk805_pinconf_get(struct pinctrl_dev *pctldev, switch (param) { case PIN_CONFIG_OUTPUT: + case PIN_CONFIG_INPUT_ENABLE: arg = rk805_gpio_get(&pci->gpio_chip, pin); break; default: @@ -567,6 +660,14 @@ static const struct pinctrl_desc rk805_pinctrl_desc = { .owner = THIS_MODULE, }; +static struct pinctrl_desc rk816_pinctrl_desc = { + .name = "rk816-pinctrl", + .pctlops = &rk805_pinctrl_ops, + .pmxops = &rk805_pinmux_ops, + .confops = &rk805_pinconf_ops, + .owner = THIS_MODULE, +}; + static struct pinctrl_desc rk817_pinctrl_desc = { .name = "rk817-pinctrl", .pctlops = &rk805_pinctrl_ops, @@ -610,6 +711,22 @@ static int rk805_pinctrl_probe(struct platform_device *pdev) pci->pin_cfg = rk805_gpio_cfgs; pci->gpio_chip.ngpio = ARRAY_SIZE(rk805_gpio_cfgs); break; + + case RK816_ID: + pci->pinctrl_desc = rk816_pinctrl_desc; + pci->gpio_chip = rk816_gpio_chip; + pci->pins = rk816_pins_desc; + pci->num_pins = ARRAY_SIZE(rk816_pins_desc); + pci->functions = rk816_pin_functions; + pci->num_functions = ARRAY_SIZE(rk816_pin_functions); + pci->groups = rk816_pin_groups; + pci->num_pin_groups = ARRAY_SIZE(rk816_pin_groups); + pci->pinctrl_desc.pins = rk816_pins_desc; + pci->pinctrl_desc.npins = ARRAY_SIZE(rk816_pins_desc); + pci->pin_cfg = rk816_gpio_cfgs; + pci->gpio_chip.ngpio = ARRAY_SIZE(rk816_gpio_cfgs); + break; + case RK809_ID: case RK817_ID: pci->pinctrl_desc = rk817_pinctrl_desc; @@ -632,6 +749,7 @@ static int rk805_pinctrl_probe(struct platform_device *pdev) pci->gpio_chip.ngpio = 1; } break; + default: dev_err(&pdev->dev, "unsupported RK805 ID %lu\n", pci->rk808->variant); diff --git a/include/linux/mfd/rk808.h b/include/linux/mfd/rk808.h index 829a3a07d139..76fe0acda603 100644 --- a/include/linux/mfd/rk808.h +++ b/include/linux/mfd/rk808.h @@ -113,6 +113,235 @@ enum rk808_reg { #define RK808_INT_STS_MSK_REG2 0x4f #define RK808_IO_POL_REG 0x50 +/* RK816 */ +enum rk816_reg { + RK816_ID_DCDC1, + RK816_ID_DCDC2, + RK816_ID_DCDC3, + RK816_ID_DCDC4, + RK816_ID_LDO1, + RK816_ID_LDO2, + RK816_ID_LDO3, + RK816_ID_LDO4, + RK816_ID_LDO5, + RK816_ID_LDO6, +}; + +/*VERSION REGISTER*/ +#define RK816_CHIP_NAME_REG 0x17 +#define RK816_CHIP_VER_REG 0x18 +#define RK816_OTP_VER_REG 0x19 +#define RK816_NUM_REGULATORS 10 + +/*POWER ON/OFF REGISTER*/ +#define RK816_VB_MON_REG 0x21 +#define RK816_THERMAL_REG 0x22 +#define RK816_PWRON_LP_INT_TIME_REG 0x47 +#define RK816_PWRON_DB_REG 0x48 +#define RK816_DEV_CTRL_REG 0x4B +#define RK816_ON_SOURCE_REG 0xAE +#define RK816_OFF_SOURCE_REG 0xAF + +/*POWER CHANNELS ENABLE REGISTER*/ +#define RK816_DCDC_EN_REG1 0x23 +#define RK816_DCDC_EN_REG2 0x24 +#define RK816_SLP_DCDC_EN_REG 0x25 +#define RK816_SLP_LDO_EN_REG 0x26 +#define RK816_LDO_EN_REG1 0x27 +#define RK816_LDO_EN_REG2 0x28 + +/*BUCK AND LDO CONFIG REGISTER*/ +#define RK816_BUCK1_CONFIG_REG 0x2E +#define RK816_BUCK1_ON_VSEL_REG 0x2F +#define RK816_BUCK1_SLP_VSEL_REG 0x30 +#define RK816_BUCK2_CONFIG_REG 0x32 +#define RK816_BUCK2_ON_VSEL_REG 0x33 +#define RK816_BUCK2_SLP_VSEL_REG 0x34 +#define RK816_BUCK3_CONFIG_REG 0x36 +#define RK816_BUCK4_CONFIG_REG 0x37 +#define RK816_BUCK4_ON_VSEL_REG 0x38 +#define RK816_BUCK4_SLP_VSEL_REG 0x39 +#define RK816_LDO1_ON_VSEL_REG 0x3B +#define RK816_LDO1_SLP_VSEL_REG 0x3C +#define RK816_LDO2_ON_VSEL_REG 0x3D +#define RK816_LDO2_SLP_VSEL_REG 0x3E +#define RK816_LDO3_ON_VSEL_REG 0x3F +#define RK816_LDO3_SLP_VSEL_REG 0x40 +#define RK816_LDO4_ON_VSEL_REG 0x41 +#define RK816_LDO4_SLP_VSEL_REG 0x42 +#define RK816_LDO5_ON_VSEL_REG 0x43 +#define RK816_LDO5_SLP_VSEL_REG 0x44 +#define RK816_LDO6_ON_VSEL_REG 0x45 +#define RK816_LDO6_SLP_VSEL_REG 0x46 +#define RK816_GPIO_IO_POL_REG 0x50 + +/*CHARGER BOOST AND OTG REGISTER*/ +#define RK816_OTG_BUCK_LDO_CONFIG_REG 0x2A +#define RK816_CHRG_CONFIG_REG 0x2B +#define RK816_BOOST_ON_VESL_REG 0x54 +#define RK816_BOOST_SLP_VSEL_REG 0x55 +#define RK816_CHRG_BOOST_CONFIG_REG 0x9A +#define RK816_SUP_STS_REG 0xA0 +#define RK816_USB_CTRL_REG 0xA1 +#define RK816_CHRG_CTRL_REG1 0xA3 +#define RK816_CHRG_CTRL_REG2 0xA4 +#define RK816_CHRG_CTRL_REG3 0xA5 +#define RK816_BAT_CTRL_REG 0xA6 +#define RK816_BAT_HTS_TS_REG 0xA8 +#define RK816_BAT_LTS_TS_REG 0xA9 + +#define RK816_TS_CTRL_REG 0xAC +#define RK816_ADC_CTRL_REG 0xAD +#define RK816_GGCON_REG 0xB0 +#define RK816_GGSTS_REG 0xB1 +#define RK816_ZERO_CUR_ADC_REGH 0xB2 +#define RK816_ZERO_CUR_ADC_REGL 0xB3 +#define RK816_GASCNT_CAL_REG3 0xB4 +#define RK816_GASCNT_CAL_REG2 0xB5 +#define RK816_GASCNT_CAL_REG1 0xB6 +#define RK816_GASCNT_CAL_REG0 0xB7 +#define RK816_GASCNT_REG3 0xB8 +#define RK816_GASCNT_REG2 0xB9 +#define RK816_GASCNT_REG1 0xBA +#define RK816_GASCNT_REG0 0xBB +#define RK816_BAT_CUR_AVG_REGH 0xBC +#define RK816_BAT_CUR_AVG_REGL 0xBD +#define RK816_TS_ADC_REGH 0xBE +#define RK816_TS_ADC_REGL 0xBF +#define RK816_USB_ADC_REGH 0xC0 +#define RK816_USB_ADC_REGL 0xC1 +#define RK816_BAT_OCV_REGH 0xC2 +#define RK816_BAT_OCV_REGL 0xC3 +#define RK816_BAT_VOL_REGH 0xC4 +#define RK816_BAT_VOL_REGL 0xC5 +#define RK816_RELAX_ENTRY_THRES_REGH 0xC6 +#define RK816_RELAX_ENTRY_THRES_REGL 0xC7 +#define RK816_RELAX_EXIT_THRES_REGH 0xC8 +#define RK816_RELAX_EXIT_THRES_REGL 0xC9 +#define RK816_RELAX_VOL1_REGH 0xCA +#define RK816_RELAX_VOL1_REGL 0xCB +#define RK816_RELAX_VOL2_REGH 0xCC +#define RK816_RELAX_VOL2_REGL 0xCD +#define RK816_RELAX_CUR1_REGH 0xCE +#define RK816_RELAX_CUR1_REGL 0xCF +#define RK816_RELAX_CUR2_REGH 0xD0 +#define RK816_RELAX_CUR2_REGL 0xD1 +#define RK816_CAL_OFFSET_REGH 0xD2 +#define RK816_CAL_OFFSET_REGL 0xD3 +#define RK816_NON_ACT_TIMER_CNT_REG 0xD4 +#define RK816_VCALIB0_REGH 0xD5 +#define RK816_VCALIB0_REGL 0xD6 +#define RK816_VCALIB1_REGH 0xD7 +#define RK816_VCALIB1_REGL 0xD8 +#define RK816_FCC_GASCNT_REG3 0xD9 +#define RK816_FCC_GASCNT_REG2 0xDA +#define RK816_FCC_GASCNT_REG1 0xDB +#define RK816_FCC_GASCNT_REG0 0xDC +#define RK816_IOFFSET_REGH 0xDD +#define RK816_IOFFSET_REGL 0xDE +#define RK816_SLEEP_CON_SAMP_CUR_REG 0xDF + +/*DATA REGISTER*/ +#define RK816_SOC_REG 0xE0 +#define RK816_REMAIN_CAP_REG3 0xE1 +#define RK816_REMAIN_CAP_REG2 0xE2 +#define RK816_REMAIN_CAP_REG1 0xE3 +#define RK816_REMAIN_CAP_REG0 0xE4 +#define RK816_UPDATE_LEVE_REG 0xE5 +#define RK816_NEW_FCC_REG3 0xE6 +#define RK816_NEW_FCC_REG2 0xE7 +#define RK816_NEW_FCC_REG1 0xE8 +#define RK816_NEW_FCC_REG0 0xE9 +#define RK816_NON_ACT_TIMER_CNT_REG_SAVE 0xEA +#define RK816_OCV_VOL_VALID_REG 0xEB +#define RK816_REBOOT_CNT_REG 0xEC +#define RK816_PCB_IOFFSET_REG 0xED +#define RK816_MISC_MARK_REG 0xEE +#define RK816_HALT_CNT_REG 0xEF +#define RK816_CALC_REST_REGH 0xF0 +#define RK816_CALC_REST_REGL 0xF1 +#define DATA18_REG 0xF2 + +/*INTERRUPT REGISTER*/ +#define RK816_INT_STS_REG1 0x49 +#define RK816_INT_STS_MSK_REG1 0x4A +#define RK816_INT_STS_REG2 0x4C +#define RK816_INT_STS_MSK_REG2 0x4D +#define RK816_INT_STS_REG3 0x4E +#define RK816_INT_STS_MSK_REG3 0x4F +#define RK816_GPIO_IO_POL_REG 0x50 + +#define RK816_DATA18_REG 0xF2 + +/* IRQ Definitions */ +#define RK816_IRQ_PWRON_FALL 0 +#define RK816_IRQ_PWRON_RISE 1 +#define RK816_IRQ_VB_LOW 2 +#define RK816_IRQ_PWRON 3 +#define RK816_IRQ_PWRON_LP 4 +#define RK816_IRQ_HOTDIE 5 +#define RK816_IRQ_RTC_ALARM 6 +#define RK816_IRQ_RTC_PERIOD 7 +#define RK816_IRQ_USB_OV 8 +#define RK816_IRQ_PLUG_IN 9 +#define RK816_IRQ_PLUG_OUT 10 +#define RK816_IRQ_CHG_OK 11 +#define RK816_IRQ_CHG_TE 12 +#define RK816_IRQ_CHG_TS 13 +#define RK816_IRQ_CHG_CVTLIM 14 +#define RK816_IRQ_DISCHG_ILIM 15 + +#define RK816_IRQ_PWRON_FALL_MSK BIT(5) +#define RK816_IRQ_PWRON_RISE_MSK BIT(6) +#define RK816_IRQ_VB_LOW_MSK BIT(1) +#define RK816_IRQ_PWRON_MSK BIT(2) +#define RK816_IRQ_PWRON_LP_MSK BIT(3) +#define RK816_IRQ_HOTDIE_MSK BIT(4) +#define RK816_IRQ_RTC_ALARM_MSK BIT(5) +#define RK816_IRQ_RTC_PERIOD_MSK BIT(6) +#define RK816_IRQ_USB_OV_MSK BIT(7) +#define RK816_IRQ_PLUG_IN_MSK BIT(0) +#define RK816_IRQ_PLUG_OUT_MSK BIT(1) +#define RK816_IRQ_CHG_OK_MSK BIT(2) +#define RK816_IRQ_CHG_TE_MSK BIT(3) +#define RK816_IRQ_CHG_TS_MSK BIT(4) +#define RK816_IRQ_CHG_CVTLIM_MSK BIT(6) +#define RK816_IRQ_DISCHG_ILIM_MSK BIT(7) + +#define RK816_VBAT_LOW_2V8 0x00 +#define RK816_VBAT_LOW_2V9 0x01 +#define RK816_VBAT_LOW_3V0 0x02 +#define RK816_VBAT_LOW_3V1 0x03 +#define RK816_VBAT_LOW_3V2 0x04 +#define RK816_VBAT_LOW_3V3 0x05 +#define RK816_VBAT_LOW_3V4 0x06 +#define RK816_VBAT_LOW_3V5 0x07 +#define RK816_PWR_FALL_INT_STATUS (0x1 << 5) +#define RK816_PWR_RISE_INT_STATUS (0x1 << 6) +#define RK816_ALARM_INT_STATUS (0x1 << 5) +#define EN_VBAT_LOW_IRQ (0x1 << 4) +#define VBAT_LOW_ACT_MASK (0x1 << 4) +#define RTC_TIMER_ALARM_INT_MSK (0x3 << 2) +#define RTC_TIMER_ALARM_INT_DIS (0x0 << 2) +#define RTC_PERIOD_ALARM_INT_MSK (0x3 << 5) +#define RTC_PERIOD_ALARM_INT_ST (0x3 << 5) +#define RTC_PERIOD_ALARM_INT_DIS (0x3 << 5) +#define RTC_PERIOD_ALARM_INT_EN (0x9f) +#define REG_WRITE_MSK 0xff +#define BUCK4_MAX_ILIMIT 0x2c +#define BUCK_RATE_MSK (0x3 << 3) +#define BUCK_RATE_12_5MV_US (0x2 << 3) +#define ALL_INT_FLAGS_ST 0xff +#define PLUGIN_OUT_INT_EN 0xfc +#define RK816_PWRON_FALL_RISE_INT_EN 0x9f +#define BUCK1_2_IMAX_MAX (0x3 << 6) +#define BUCK3_4_IMAX_MAX (0x3 << 3) +#define BOOST_DISABLE ((0x1 << 5) | (0x0 << 1)) +#define BUCK4_VRP_3PERCENT 0xc0 +#define RK816_BUCK_DVS_CONFIRM (0x1 << 7) +#define RK816_TYPE_ES2 0x05 +#define RK816_CHIP_VERSION_MASK 0x0f + /* RK818 */ #define RK818_DCDC1 0 #define RK818_LDO1 4 @@ -423,6 +652,107 @@ enum rk805_reg { #define RK818_NUM_IRQ 16 +/*RK818_DCDC_EN_REG*/ +#define BUCK1_EN_MASK BIT(0) +#define BUCK2_EN_MASK BIT(1) +#define BUCK3_EN_MASK BIT(2) +#define BUCK4_EN_MASK BIT(3) +#define BOOST_EN_MASK BIT(4) +#define LDO9_EN_MASK BIT(5) +#define SWITCH_EN_MASK BIT(6) +#define OTG_EN_MASK BIT(7) + +#define BUCK1_EN_ENABLE BIT(0) +#define BUCK2_EN_ENABLE BIT(1) +#define BUCK3_EN_ENABLE BIT(2) +#define BUCK4_EN_ENABLE BIT(3) +#define BOOST_EN_ENABLE BIT(4) +#define LDO9_EN_ENABLE BIT(5) +#define SWITCH_EN_ENABLE BIT(6) +#define OTG_EN_ENABLE BIT(7) + +#define BUCK1_SLP_SET_MASK BIT(0) +#define BUCK2_SLP_SET_MASK BIT(1) +#define BUCK3_SLP_SET_MASK BIT(2) +#define BUCK4_SLP_SET_MASK BIT(3) +#define BOOST_SLP_SET_MASK BIT(4) +#define LDO9_SLP_SET_MASK BIT(5) +#define SWITCH_SLP_SET_MASK BIT(6) +#define OTG_SLP_SET_MASK BIT(7) + +#define BUCK1_SLP_SET_OFF BIT(0) +#define BUCK2_SLP_SET_OFF BIT(1) +#define BUCK3_SLP_SET_OFF BIT(2) +#define BUCK4_SLP_SET_OFF BIT(3) +#define BOOST_SLP_SET_OFF BIT(4) +#define LDO9_SLP_SET_OFF BIT(5) +#define SWITCH_SLP_SET_OFF BIT(6) +#define OTG_SLP_SET_OFF BIT(7) +#define OTG_BOOST_SLP_OFF (BOOST_SLP_SET_OFF | OTG_SLP_SET_OFF) + +#define BUCK1_SLP_SET_ON BIT(0) +#define BUCK2_SLP_SET_ON BIT(1) +#define BUCK3_SLP_SET_ON BIT(2) +#define BUCK4_SLP_SET_ON BIT(3) +#define BOOST_SLP_SET_ON BIT(4) +#define LDO9_SLP_SET_ON BIT(5) +#define SWITCH_SLP_SET_ON BIT(6) +#define OTG_SLP_SET_ON BIT(7) + +#define VOUT_LO_MASK BIT(0) +#define VB_LO_MASK BIT(1) +#define PWRON_MASK BIT(2) +#define PWRON_LP_MASK BIT(3) +#define HOTDIE_MASK BIT(4) +#define RTC_ALARM_MASK BIT(5) +#define RTC_PERIOD_MASK BIT(6) +#define USB_OV_MASK BIT(7) + +#define VOUT_LO_DISABLE BIT(0) +#define VB_LO_DISABLE BIT(1) +#define PWRON_DISABLE BIT(2) +#define PWRON_LP_DISABLE BIT(3) +#define HOTDIE_DISABLE BIT(4) +#define RTC_ALARM_DISABLE BIT(5) +#define RTC_PERIOD_DISABLE BIT(6) +#define USB_OV_INT_DISABLE BIT(7) + +#define VOUT_LO_ENABLE (0 << 0) +#define VB_LO_ENABLE (0 << 1) +#define PWRON_ENABLE (0 << 2) +#define PWRON_LP_ENABLE (0 << 3) +#define HOTDIE_ENABLE (0 << 4) +#define RTC_ALARM_ENABLE (0 << 5) +#define RTC_PERIOD_ENABLE (0 << 6) +#define USB_OV_INT_ENABLE (0 << 7) + +#define PLUG_IN_MASK BIT(0) +#define PLUG_OUT_MASK BIT(1) +#define CHGOK_MASK BIT(2) +#define CHGTE_MASK BIT(3) +#define CHGTS1_MASK BIT(4) +#define TS2_MASK BIT(5) +#define CHG_CVTLIM_MASK BIT(6) +#define DISCHG_ILIM_MASK BIT(7) + +#define PLUG_IN_DISABLE BIT(0) +#define PLUG_OUT_DISABLE BIT(1) +#define CHGOK_DISABLE BIT(2) +#define CHGTE_DISABLE BIT(3) +#define CHGTS1_DISABLE BIT(4) +#define TS2_DISABLE BIT(5) +#define CHG_CVTLIM_DISABLE BIT(6) +#define DISCHG_ILIM_DISABLE BIT(7) + +#define PLUG_IN_ENABLE BIT(0) +#define PLUG_OUT_ENABLE BIT(1) +#define CHGOK_ENABLE BIT(2) +#define CHGTE_ENABLE BIT(3) +#define CHGTS1_ENABLE BIT(4) +#define TS2_ENABLE BIT(5) +#define CHG_CVTLIM_ENABLE BIT(6) +#define DISCHG_ILIM_ENABLE BIT(7) + #define RK808_VBAT_LOW_2V8 0x00 #define RK808_VBAT_LOW_2V9 0x01 #define RK808_VBAT_LOW_3V0 0x02 @@ -457,6 +787,7 @@ enum rk805_reg { #define VOUT_LO_INT BIT(0) #define CLK32KOUT2_EN BIT(0) +#define TEMP105C 0x08 #define TEMP115C 0x0c #define TEMP_HOTDIE_MSK 0x0c #define SLP_SD_MSK (0x3 << 2) @@ -466,6 +797,7 @@ enum rk805_reg { #define PWM_MODE_MSK BIT(7) #define FPWM_MODE BIT(7) #define AUTO_PWM_MODE 0 +#define REGS_WMSK 0xf0 enum rk817_reg_id { RK817_ID_DCDC1 = 0, @@ -687,6 +1019,7 @@ enum { RK805_ID = 0x8050, RK808_ID = 0x0000, RK809_ID = 0x8090, + RK816_ID = 0x8160, RK817_ID = 0x8170, RK818_ID = 0x8180, }; @@ -701,6 +1034,7 @@ struct rk808_pin_info { struct rk808 { struct i2c_client *i2c; struct regmap_irq_chip_data *irq_data; + struct regmap_irq_chip_data *battery_irq_data; struct regmap *regmap; long variant; const struct regmap_config *regmap_cfg;