From 5aef55300bcce72d3b4ea9149b5e4db40c286555 Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Fri, 25 Feb 2022 10:12:55 +0800
Subject: [PATCH] arm64: dts: rockchip: rk3588s: Add pclk_vo1_grf clock

Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I7ab10a5091b1396858142162fbf537ac5431e98e
---
 arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
index a689b3ae13e2..bd607cd2f859 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -285,6 +285,14 @@
 			clock-names = "link";
 			#clock-cells = <0>;
 		};
+
+		pclk_vo1_grf: pclk_vo1_grf@fd7c08ec {
+			compatible = "rockchip,rk3588-clock-gate-link";
+			reg = <0x0 0xfd7c08ec 0x0 0x4>;
+			clocks = <&hclk_vo1>;
+			clock-names = "link";
+			#clock-cells = <0>;
+		};
 	};
 
 	cpus {
@@ -1548,6 +1556,7 @@
 	vo1_grf: syscon@fd5a8000 {
 		compatible = "rockchip,rk3588-vo-grf", "syscon";
 		reg = <0x0 0xfd5a8000 0x0 0x100>;
+		clocks = <&pclk_vo1_grf>;
 	};
 
 	usb_grf: syscon@fd5ac000 {