diff --git a/drivers/media/platform/rockchip/isp/hw.c b/drivers/media/platform/rockchip/isp/hw.c
index 8801dc438b64..899bee986397 100644
--- a/drivers/media/platform/rockchip/isp/hw.c
+++ b/drivers/media/platform/rockchip/isp/hw.c
@@ -758,18 +758,6 @@ static int enable_sys_clk(struct rkisp_hw_dev *dev)
 		writel(0, dev->base_addr + CIF_ISP_CSI0_MASK1);
 		writel(0, dev->base_addr + CIF_ISP_CSI0_MASK2);
 		writel(0, dev->base_addr + CIF_ISP_CSI0_MASK3);
-	} else if (dev->isp_ver == ISP_V30) {
-		writel(ISP3X_RAWX_RD_BURST_LEN16 |
-		       ISP3X_RAWX_WR_BURST_LEN16 |
-		       ISP3X_RD_RAWX_GROUP_MODE_X4 |
-		       ISP3X_WR_RAWX_GROUP_MODE_X4,
-		       dev->base_addr + ISP3X_MI_RD_CTRL2);
-		if (dev->is_unite)
-			writel(ISP3X_RAWX_RD_BURST_LEN16 |
-			       ISP3X_RAWX_WR_BURST_LEN16 |
-			       ISP3X_RD_RAWX_GROUP_MODE_X4 |
-			       ISP3X_WR_RAWX_GROUP_MODE_X4,
-			       dev->base_next_addr + ISP3X_MI_RD_CTRL2);
 	}
 
 	return 0;
diff --git a/drivers/media/platform/rockchip/isp/regs_v3x.h b/drivers/media/platform/rockchip/isp/regs_v3x.h
index 31b881684380..917ddbc1bb94 100644
--- a/drivers/media/platform/rockchip/isp/regs_v3x.h
+++ b/drivers/media/platform/rockchip/isp/regs_v3x.h
@@ -1684,28 +1684,6 @@
 #define ISP3X_DBR_ST_MODE		BIT(30)
 #define ISP3X_DBR_ST			BIT(31)
 
-/* MI_RD_CTRL2 */
-#define ISP3X_RAWX_RD_BURST_LEN_MASK	GENMASK(23, 22)
-#define ISP3X_RAWX_WR_BURST_LEN_MASK	GENMASK(21, 20)
-#define ISP3X_RD_RAWX_GROUP_MODE_MASK	GENMASK(19, 18)
-#define ISP3X_WR_RAWX_GROUP_MODE_MASK	GENMASK(17, 16)
-#define ISP3X_RAWX_RD_BURST_LEN4	0
-#define ISP3X_RAWX_RD_BURST_LEN8	BIT(22)
-#define ISP3X_RAWX_RD_BURST_LEN16	BIT(23)
-#define ISP3X_RAWX_RD_BURST_LEN2	(0x3 << 22)
-#define ISP3X_RAWX_WR_BURST_LEN4	0
-#define ISP3X_RAWX_WR_BURST_LEN8	BIT(20)
-#define ISP3X_RAWX_WR_BURST_LEN16	BIT(21)
-#define ISP3X_RAWX_WR_BURST_LEN2	(0x3 << 20)
-#define ISP3X_RD_RAWX_GROUP_MODE_X4	0
-#define ISP3X_RD_RAWX_GROUP_MODE_X3	BIT(18)
-#define ISP3X_RD_RAWX_GROUP_MODE_X2	BIT(19)
-#define ISP3X_RD_RAWX_GROUP_MODE_X1	(0x3 << 18)
-#define ISP3X_WR_RAWX_GROUP_MODE_X4	0
-#define ISP3X_WR_RAWX_GROUP_MODE_X3	BIT(16)
-#define ISP3X_WR_RAWX_GROUP_MODE_X2	BIT(17)
-#define ISP3X_WR_RAWX_GROUP_MODE_X1	(0x3 << 16)
-
 /* BP_WR_CTRL */
 #define ISP3X_BP_ENABLE			BIT(0)
 #define ISP3X_BP_AUTO_UPD		BIT(1)