From 5be8b6507f7fd570617e331bda05bf11968120c3 Mon Sep 17 00:00:00 2001 From: frank zhao Date: Wed, 8 Aug 2018 09:43:28 -0400 Subject: [PATCH] di: add mif enable after reset for g12 PD#171440: di: add mif enable after reset for g12 Change-Id: I61e3b7e96b88b8875d7de4948fa627c4882ab810 Signed-off-by: frank zhao --- drivers/amlogic/media/deinterlace/deinterlace.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/amlogic/media/deinterlace/deinterlace.c b/drivers/amlogic/media/deinterlace/deinterlace.c index 6488b2ffd83d..fb77151d7275 100644 --- a/drivers/amlogic/media/deinterlace/deinterlace.c +++ b/drivers/amlogic/media/deinterlace/deinterlace.c @@ -124,7 +124,7 @@ static di_dev_t *de_devp; static dev_t di_devno; static struct class *di_clsp; -static const char version_s[] = "2018-08-06a"; +static const char version_s[] = "2018-08-09a"; static int bypass_state = 1; static int bypass_all; @@ -3032,18 +3032,18 @@ static void pre_de_process(void) vdin_ops->tvin_vdin_func(0, &vdin_arg); } #endif - /* must make sure follow part issue without iterrupts, + /* must make sure follow part issue without interrupts, * otherwise may cause watch dog reboot */ di_lock_irqfiq_save(irq_flag2); - if (cpu_after_eq(MESON_CPU_MAJOR_ID_G12A)) { + if (cpu_after_eq(MESON_CPU_MAJOR_ID_G12A)) pre_frame_reset_g12(di_pre_stru.madi_enable, di_pre_stru.mcdi_enable); - } else { + else pre_frame_reset(); - /* enable mc pre mif*/ - enable_di_pre_mif(true, mcpre_en); - } + + /* enable mc pre mif*/ + enable_di_pre_mif(true, mcpre_en); di_unlock_irqfiq_restore(irq_flag2); /*reinit pre busy flag*/ di_pre_stru.pre_de_busy_timer_count = 0;