From b181a04f7d0a934dd522883599a48d307a384c80 Mon Sep 17 00:00:00 2001 From: Jianwei Fan Date: Tue, 1 Jul 2025 17:05:33 +0800 Subject: [PATCH 01/16] media: i2c: ov50c40: set 4k@15 for debug when cphy mode Signed-off-by: Jianwei Fan Change-Id: Id8d1eb7b86529542aaa4bc0974340557a7a020dc --- drivers/media/i2c/ov50c40.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/media/i2c/ov50c40.c b/drivers/media/i2c/ov50c40.c index 4ea12cb348d8..18bd3975a88a 100644 --- a/drivers/media/i2c/ov50c40.c +++ b/drivers/media/i2c/ov50c40.c @@ -3914,6 +3914,7 @@ static const struct regval ov50c40_10bit_8192x6144_dphy_12fps_regs[] = { {REG_NULL, 0x00}, }; +#ifdef DEBUG static const struct regval ov50c40_10bit_4096x3072_cphy_regs[] = { {0x0103, 0x01}, {0x0301, 0xc0}, @@ -4504,6 +4505,7 @@ static const struct regval ov50c40_10bit_4096x3072_cphy_regs[] = { {0x5d45, 0x05}, {REG_NULL, 0x00}, }; +#endif static const struct regval ov50c40_10bit_4096x3072_cphy_30fps_regs[] = { {0x0103, 0x01}, @@ -5828,6 +5830,7 @@ static const struct ov50c40_mode supported_modes_dphy[] = { }; static const struct ov50c40_mode supported_modes_cphy[] = { +#ifdef DEBUG { .bus_fmt = MEDIA_BUS_FMT_SGBRG10_1X10, .width = 4096, @@ -5846,6 +5849,7 @@ static const struct ov50c40_mode supported_modes_cphy[] = { .spd = &ov50c40_spd, .vc[PAD0] = 0, }, +#endif { .bus_fmt = MEDIA_BUS_FMT_SGBRG10_1X10, .width = 4096, From a88b101479e22436f0274ae34191fc2004d375ef Mon Sep 17 00:00:00 2001 From: Jkand Huang Date: Wed, 2 Jul 2025 09:10:20 +0800 Subject: [PATCH 02/16] ARM: configs: rockchip: rename rv1126b-wakeup.config to rv1126b-aov.config Signed-off-by: Jkand Huang Change-Id: Iebbb1ddb86f38d80fbc1f767547677879fea45ca --- arch/arm/configs/{rv1126b-wakeup.config => rv1126b-aov.config} | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename arch/arm/configs/{rv1126b-wakeup.config => rv1126b-aov.config} (100%) diff --git a/arch/arm/configs/rv1126b-wakeup.config b/arch/arm/configs/rv1126b-aov.config similarity index 100% rename from arch/arm/configs/rv1126b-wakeup.config rename to arch/arm/configs/rv1126b-aov.config From 1df410e5457351c7d6b1777bff8a9dfa232ea098 Mon Sep 17 00:00:00 2001 From: Jkand Huang Date: Mon, 30 Jun 2025 17:49:31 +0800 Subject: [PATCH 03/16] ARM: configs: rv1126b-aov.config: disabled ethernet Signed-off-by: Jkand Huang Change-Id: I937fa62a2f1eb090ae477a9ff358566e948c520a --- arch/arm/configs/rv1126b-aov.config | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/configs/rv1126b-aov.config b/arch/arm/configs/rv1126b-aov.config index a8178ffbaa98..ad3e46bc5392 100644 --- a/arch/arm/configs/rv1126b-aov.config +++ b/arch/arm/configs/rv1126b-aov.config @@ -1,5 +1,8 @@ +# CONFIG_ETHERNET is not set CONFIG_EXTCON=y CONFIG_INPUT=y +# CONFIG_MDIO_DEVICE is not set +# CONFIG_PHYLIB is not set CONFIG_SND_SOC_RK_DSM=y CONFIG_VIDEO_CAM_SLEEP_WAKEUP=y # CONFIG_CHARGER_BQ24190 is not set From d043cae8a3ef634babb2fe25c9118b8905bceb4c Mon Sep 17 00:00:00 2001 From: Ziyuan Xu Date: Tue, 1 Jul 2025 14:59:33 +0800 Subject: [PATCH 04/16] ARM: configs: rv1126b: Enable CONFIG_ROCKCHIP_OPP default Change-Id: I07e65b7d20fe589d6d429bfbaabbb32a1af09675 Signed-off-by: Ziyuan Xu --- arch/arm/configs/rv1126b-cvr-fastboot.config | 2 +- arch/arm/configs/rv1126b-cvr.config | 1 - arch/arm/configs/rv1126b-evb.config | 2 +- arch/arm/configs/rv1126b-fastboot.config | 1 - arch/arm/configs/rv1126b-ipc.config | 1 - arch/arm/configs/rv1126b_defconfig | 1 + 6 files changed, 3 insertions(+), 5 deletions(-) diff --git a/arch/arm/configs/rv1126b-cvr-fastboot.config b/arch/arm/configs/rv1126b-cvr-fastboot.config index 51ac619083ea..b34193462bee 100644 --- a/arch/arm/configs/rv1126b-cvr-fastboot.config +++ b/arch/arm/configs/rv1126b-cvr-fastboot.config @@ -28,7 +28,6 @@ CONFIG_RK_DMABUF_PROCFS=y CONFIG_ROCKCHIP_DVBM=y CONFIG_ROCKCHIP_HW_DECOMPRESS=y CONFIG_ROCKCHIP_MULTI_RGA=y -CONFIG_ROCKCHIP_OPP=y CONFIG_ROCKCHIP_RAMDISK=y CONFIG_ROCKCHIP_RGA_PROC_FS=y CONFIG_ROCKCHIP_THUNDER_BOOT=y @@ -921,6 +920,7 @@ CONFIG_TOUCHSCREEN_GT1X=y # CONFIG_TOUCHSCREEN_HIDEEP is not set # CONFIG_TOUCHSCREEN_HIMAX_CHIPSET is not set # CONFIG_TOUCHSCREEN_HYCON_HY46XX is not set +# CONFIG_TOUCHSCREEN_HYN is not set # CONFIG_TOUCHSCREEN_ILI210X is not set # CONFIG_TOUCHSCREEN_ILITEK is not set # CONFIG_TOUCHSCREEN_IMAGIS is not set diff --git a/arch/arm/configs/rv1126b-cvr.config b/arch/arm/configs/rv1126b-cvr.config index d0022605523a..ef45f4e43418 100644 --- a/arch/arm/configs/rv1126b-cvr.config +++ b/arch/arm/configs/rv1126b-cvr.config @@ -31,7 +31,6 @@ CONFIG_RK_CMA_PROCFS=y CONFIG_RK_DMABUF_PROCFS=y CONFIG_RK_MEMBLOCK_PROCFS=y CONFIG_ROCKCHIP_DEBUG=y -CONFIG_ROCKCHIP_OPP=y CONFIG_ROCKCHIP_RGA_PROC_FS=y CONFIG_ROCKCHIP_VENDOR_STORAGE=y CONFIG_SND_SOC_DUMMY_CODEC=y diff --git a/arch/arm/configs/rv1126b-evb.config b/arch/arm/configs/rv1126b-evb.config index 8b0149902338..9a74d75f4196 100644 --- a/arch/arm/configs/rv1126b-evb.config +++ b/arch/arm/configs/rv1126b-evb.config @@ -31,7 +31,6 @@ CONFIG_RK_CMA_PROCFS=y CONFIG_RK_DMABUF_PROCFS=y CONFIG_RK_MEMBLOCK_PROCFS=y CONFIG_ROCKCHIP_DEBUG=y -CONFIG_ROCKCHIP_OPP=y CONFIG_ROCKCHIP_RGA_PROC_FS=y CONFIG_ROCKCHIP_VENDOR_STORAGE=y CONFIG_SND_SOC_DUMMY_CODEC=y @@ -843,6 +842,7 @@ CONFIG_TOUCHSCREEN_GT1X=y # CONFIG_TOUCHSCREEN_HIDEEP is not set # CONFIG_TOUCHSCREEN_HIMAX_CHIPSET is not set # CONFIG_TOUCHSCREEN_HYCON_HY46XX is not set +# CONFIG_TOUCHSCREEN_HYN is not set # CONFIG_TOUCHSCREEN_ILI210X is not set # CONFIG_TOUCHSCREEN_ILITEK is not set # CONFIG_TOUCHSCREEN_IMAGIS is not set diff --git a/arch/arm/configs/rv1126b-fastboot.config b/arch/arm/configs/rv1126b-fastboot.config index 3cb56be2c5e0..6c54b1bdd8db 100644 --- a/arch/arm/configs/rv1126b-fastboot.config +++ b/arch/arm/configs/rv1126b-fastboot.config @@ -22,7 +22,6 @@ CONFIG_RK_DMABUF_PROCFS=y CONFIG_ROCKCHIP_DVBM=y CONFIG_ROCKCHIP_HW_DECOMPRESS=y CONFIG_ROCKCHIP_MULTI_RGA=y -CONFIG_ROCKCHIP_OPP=y CONFIG_ROCKCHIP_RAMDISK=y CONFIG_ROCKCHIP_RGA_PROC_FS=y CONFIG_ROCKCHIP_THUNDER_BOOT=y diff --git a/arch/arm/configs/rv1126b-ipc.config b/arch/arm/configs/rv1126b-ipc.config index c2e72a2f6547..80900a2ccda4 100644 --- a/arch/arm/configs/rv1126b-ipc.config +++ b/arch/arm/configs/rv1126b-ipc.config @@ -4,7 +4,6 @@ CONFIG_MSDOS_PARTITION=y CONFIG_MTD_BLOCK=y CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ISO8859_1=y -CONFIG_ROCKCHIP_OPP=y CONFIG_ROCKCHIP_RGA_PROC_FS=y CONFIG_SPI=y CONFIG_VFAT_FS=y diff --git a/arch/arm/configs/rv1126b_defconfig b/arch/arm/configs/rv1126b_defconfig index 7eff13e7bc91..c967a50d82f6 100644 --- a/arch/arm/configs/rv1126b_defconfig +++ b/arch/arm/configs/rv1126b_defconfig @@ -175,6 +175,7 @@ CONFIG_ROCKCHIP_IOMMU=y CONFIG_CPU_RV1126B=y CONFIG_ROCKCHIP_AMP=y CONFIG_ROCKCHIP_CPUINFO=y +CONFIG_ROCKCHIP_OPP=y CONFIG_ROCKCHIP_PM_DOMAINS=y CONFIG_ROCKCHIP_SYSTEM_MONITOR=y CONFIG_FIQ_DEBUGGER=y From 43d16b2df2f115eddd54641ff4dcf32f7c6cf383 Mon Sep 17 00:00:00 2001 From: Weiwen Chen Date: Tue, 1 Jul 2025 20:02:18 +0800 Subject: [PATCH 05/16] arm64: dts: rockchip: Add rv1126b-evb1-v12.dtsi Signed-off-by: Weiwen Chen Change-Id: Id81419915a4e89d1e361470c2a7aad36ad2876f6 --- .../boot/dts/rockchip/rv1126b-evb1-v12.dtsi | 143 ++++++++++++++++++ 1 file changed, 143 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rv1126b-evb1-v12.dtsi diff --git a/arch/arm64/boot/dts/rockchip/rv1126b-evb1-v12.dtsi b/arch/arm64/boot/dts/rockchip/rv1126b-evb1-v12.dtsi new file mode 100644 index 000000000000..a6d009dc40bb --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rv1126b-evb1-v12.dtsi @@ -0,0 +1,143 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2025 Rockchip Electronics Co., Ltd. + * + */ + +#include "rv1126b-evb1-v11.dtsi" + +/delete-node/ &vccio_sd; +/delete-node/ &vdd_npu; +/delete-node/ &rk801; + +/ { + model = "Rockchip RV1126B EVB1 V12 Board"; + compatible = "rockchip,rv1126b-evb1-v12", "rockchip,rv1126b"; + + vdd_cpu: vdd-cpu { + compatible = "pwm-regulator"; + pwms = <&pwm0_8ch_0 0 25000 1>; + regulator-name = "vdd_cpu"; + regulator-init-microvolt = <950000>; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + regulator-boot-on; + pwm-supply = <&vcc5v0_sys>; + }; +}; + +&i2c0 { + status = "okay"; + + rk801: rk801@27 { + compatible = "rockchip,rk801"; + status = "okay"; + reg = <0x27>; + interrupt-parent = <&gpio0>; + interrupts = ; + pwrctrl-gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; + + pinctrl-names = "default", "pmic-reset"; + pinctrl-0 = <&pmic_int>; + pinctrl-1 = <&soc_pwrctrl_reset>; + rockchip,system-power-controller; + wakeup-source; + + vcc1-supply = <&vcc12v_dcin>; + vcc2-supply = <&vcc12v_dcin>; + vcc3-supply = <&vcc5v0_sys>; + vcc4-supply = <&vcc5v0_sys>; + vcc5-supply = <&vcc3v3_sys>; + vcc6-supply = <&vcc3v3_sys>; + vcc7-supply = <&vcc3v3_sys>; + + regulators { + vdd_npu: DCDC_REG1 { + regulator-name = "vdd_npu"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1500000>; + regulator-initial-mode = <0x1>; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-mode = <0x2>; + regulator-off-in-suspend; + regulator-suspend-microvolt = <950000>; + }; + }; + + vcc3v3_sys: DCDC_REG2 { + regulator-name = "vcc3v3_sys"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = <0x1>; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-mode = <0x2>; + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-mode = <0x2>; + regulator-on-in-suspend; + }; + }; + + vdd_logic: DCDC_REG4 { + regulator-name = "vdd_logic"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1500000>; + regulator-initial-mode = <0x1>; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-mode = <0x2>; + regulator-off-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vccio_sd: LDO_REG1 { + regulator-name = "vccio_sd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_1v8: LDO_REG2 { + regulator-name = "vcc_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc_3v3: SWITCH_REG { + regulator-name = "vcc_3v3"; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + }; + }; +}; From 0cc3eb70726a28bafe50a1693b9f0384f32fcfff Mon Sep 17 00:00:00 2001 From: Weiwen Chen Date: Wed, 2 Jul 2025 17:44:32 +0800 Subject: [PATCH 06/16] arm64: dts: rockchip: add rv1126b-evb1-v11.dts Signed-off-by: Weiwen Chen Change-Id: I93c02b09bd800d2f54cd805c2615dd1709fe8602 --- arch/arm64/boot/dts/rockchip/Makefile | 1 + arch/arm64/boot/dts/rockchip/rv1126b-evb1-v11.dts | 12 ++++++++++++ 2 files changed, 13 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rv1126b-evb1-v11.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index 7e2701be1746..85d955b04c4a 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -384,6 +384,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb1-v10-fastboot-emmc.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb1-v10-fastboot-spi-nand.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb1-v10-fastboot-spi-nor.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb1-v10-spi-nor.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb1-v11.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb2-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb2-v10-aov-dual-cam.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb2-v10-mcu-k350c4516t.dtb diff --git a/arch/arm64/boot/dts/rockchip/rv1126b-evb1-v11.dts b/arch/arm64/boot/dts/rockchip/rv1126b-evb1-v11.dts new file mode 100644 index 000000000000..2ceb738121d4 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rv1126b-evb1-v11.dts @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2025 Rockchip Electronics Co., Ltd. + */ + +#include "rv1126b-evb1-v10.dts" +#include "rv1126b-evb1-v11.dtsi" + +/ { + model = "Rockchip RV1126B EVB1 V11 Board"; + compatible = "rockchip,rv1126b-evb1-v11", "rockchip,rv1126b"; +}; From f362e051cdb1c7de1c60c196e8ec4cbaabcdaa18 Mon Sep 17 00:00:00 2001 From: Weiwen Chen Date: Wed, 2 Jul 2025 17:45:05 +0800 Subject: [PATCH 07/16] ARM: dts: rockchip: add rv1126b-evb1-v11.dts Signed-off-by: Weiwen Chen Change-Id: I29bcb0666f6a840834280b5ccd2a0dd7630757f7 --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/rv1126b-evb1-v11.dts | 6 ++++++ 2 files changed, 7 insertions(+) create mode 100644 arch/arm/boot/dts/rv1126b-evb1-v11.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index a4d0587fada1..25bc014bd5b2 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1183,6 +1183,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rv1126b-evb1-v10-fastboot-spi-nand.dtb \ rv1126b-evb1-v10-fastboot-spi-nor.dtb \ rv1126b-evb1-v10-spi-nor.dtb \ + rv1126b-evb1-v11.dtb \ rv1126b-evb2-v10.dtb \ rv1126b-evb2-v10-mcu-k350c4516t.dtb \ rv1126b-evb2-v10-rgb-Q7050ITH2641AA1T.dtb \ diff --git a/arch/arm/boot/dts/rv1126b-evb1-v11.dts b/arch/arm/boot/dts/rv1126b-evb1-v11.dts new file mode 100644 index 000000000000..1b65e3ffc1c7 --- /dev/null +++ b/arch/arm/boot/dts/rv1126b-evb1-v11.dts @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2025 Rockchip Electronics Co., Ltd. + */ + +#include "arm64/rockchip/rv1126b-evb1-v11.dts" From 95b49485f9684bbd84aa00b394d3d83da6fd3cbc Mon Sep 17 00:00:00 2001 From: Weiwen Chen Date: Wed, 2 Jul 2025 18:02:46 +0800 Subject: [PATCH 08/16] arm64: dts: rockchip: add rv1126b-evb1-v11-dual-4k.dts Signed-off-by: Weiwen Chen Change-Id: I4abe60077c832b6d174cd24a99c326fe1929bd03 --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rv1126b-evb1-v11-dual-4k.dts | 12 ++++++++++++ 2 files changed, 13 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rv1126b-evb1-v11-dual-4k.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index 85d955b04c4a..1bccd6fa1c84 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -385,6 +385,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb1-v10-fastboot-spi-nand.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb1-v10-fastboot-spi-nor.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb1-v10-spi-nor.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb1-v11.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb1-v11-dual-4k.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb2-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb2-v10-aov-dual-cam.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb2-v10-mcu-k350c4516t.dtb diff --git a/arch/arm64/boot/dts/rockchip/rv1126b-evb1-v11-dual-4k.dts b/arch/arm64/boot/dts/rockchip/rv1126b-evb1-v11-dual-4k.dts new file mode 100644 index 000000000000..7594524c8867 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rv1126b-evb1-v11-dual-4k.dts @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2025 Rockchip Electronics Co., Ltd. + */ + +#include "rv1126b-evb1-v10-dual-4k.dts" +#include "rv1126b-evb1-v11.dtsi" + +/ { + model = "Rockchip RV1126B EVB1 V11 DUAL 4K Board"; + compatible = "rockchip,rv1126b-evb1-v11-dual-4k", "rockchip,rv1126b"; +}; From d3658dcb6116eabe59bfb1257b614e5ab66243a6 Mon Sep 17 00:00:00 2001 From: Weiwen Chen Date: Wed, 2 Jul 2025 18:03:02 +0800 Subject: [PATCH 09/16] ARM: dts: rockchip: add rv1126b-evb1-v11-dual-4k.dts Signed-off-by: Weiwen Chen Change-Id: Ie5bb7aede43822aae6eb35df31e4574113458ba5 --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/rv1126b-evb1-v11-dual-4k.dts | 6 ++++++ 2 files changed, 7 insertions(+) create mode 100644 arch/arm/boot/dts/rv1126b-evb1-v11-dual-4k.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 25bc014bd5b2..0d4ae6d03e16 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1184,6 +1184,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rv1126b-evb1-v10-fastboot-spi-nor.dtb \ rv1126b-evb1-v10-spi-nor.dtb \ rv1126b-evb1-v11.dtb \ + rv1126b-evb1-v11-dual-4k.dtb \ rv1126b-evb2-v10.dtb \ rv1126b-evb2-v10-mcu-k350c4516t.dtb \ rv1126b-evb2-v10-rgb-Q7050ITH2641AA1T.dtb \ diff --git a/arch/arm/boot/dts/rv1126b-evb1-v11-dual-4k.dts b/arch/arm/boot/dts/rv1126b-evb1-v11-dual-4k.dts new file mode 100644 index 000000000000..56e6c3b1177a --- /dev/null +++ b/arch/arm/boot/dts/rv1126b-evb1-v11-dual-4k.dts @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2025 Rockchip Electronics Co., Ltd. + */ + +#include "arm64/rockchip/rv1126b-evb1-v11-dual-4k.dts" From 074d8a755be4724bb71f75a4836f1358a4f9b1b3 Mon Sep 17 00:00:00 2001 From: Shengfei Xu Date: Thu, 3 Jul 2025 14:04:58 +0800 Subject: [PATCH 10/16] arm64: dts: rockchip: rk3576: Modify the pinctrl configuration of pmic_pins Change-Id: Iabd0c1243cb8d4959fd879c12e21fe482a151021 Signed-off-by: Shengfei Xu --- arch/arm64/boot/dts/rockchip/rk3576-pinctrl.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3576-pinctrl.dtsi b/arch/arm64/boot/dts/rockchip/rk3576-pinctrl.dtsi index 8bce5e14d03b..a5b4dcb02218 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576-pinctrl.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3576-pinctrl.dtsi @@ -5482,7 +5482,7 @@ pmic_pins: pmic-pins { rockchip,pins = /* pmic_int */ - <0 RK_PA6 9 &pcfg_pull_up>, + <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>, /* pmic_sleep */ <0 RK_PA4 9 &pcfg_pull_none>; }; From fbf3984a24fe446c1d0ac9329078c38ac05d8566 Mon Sep 17 00:00:00 2001 From: Cai YiWei Date: Wed, 18 Jun 2025 09:15:56 +0800 Subject: [PATCH 11/16] media: rockchip: isp: support unite mode for isp35 Change-Id: Ie4e237d8306f4e340552b8f5541d364cc2fce2ce Signed-off-by: Cai YiWei --- drivers/media/platform/rockchip/isp/capture.c | 28 ++++-- .../media/platform/rockchip/isp/capture_v35.c | 32 ++++++ .../media/platform/rockchip/isp/isp_sditf.c | 5 +- .../platform/rockchip/isp/isp_stats_v35.c | 18 ++-- drivers/media/platform/rockchip/isp/procfs.c | 10 +- drivers/media/platform/rockchip/isp/rkisp.c | 99 ++++++++++++------- drivers/media/platform/rockchip/isp/rkisp.h | 2 + 7 files changed, 130 insertions(+), 64 deletions(-) diff --git a/drivers/media/platform/rockchip/isp/capture.c b/drivers/media/platform/rockchip/isp/capture.c index b62ec33a73df..64bb515f30c9 100644 --- a/drivers/media/platform/rockchip/isp/capture.c +++ b/drivers/media/platform/rockchip/isp/capture.c @@ -744,11 +744,12 @@ struct capture_fmt *find_fmt(struct rkisp_stream *stream, const u32 pixelfmt) } static void restrict_rsz_resolution(struct rkisp_stream *stream, - const struct stream_config *cfg, + u32 dest_w, u32 dest_h, struct v4l2_rect *max_rsz) { struct rkisp_device *dev = stream->ispdev; struct v4l2_rect *input_win = rkisp_get_isp_sd_win(&dev->isp_sdev); + const struct stream_config *cfg = stream->config; if (stream->id == RKISP_STREAM_VIR || stream->id == RKISP_STREAM_LDC || @@ -769,14 +770,24 @@ static void restrict_rsz_resolution(struct rkisp_stream *stream, max_rsz->width = ALIGN(DIV_ROUND_UP(input_win->width, div), 4); max_rsz->height = DIV_ROUND_UP(input_win->height, div); - } else if (dev->hw_dev->unite) { + } else if (dev->unite_div > ISP_UNITE_DIV1) { /* scale down only for unite mode */ - max_rsz->width = min_t(int, input_win->width, cfg->max_rsz_width); - max_rsz->height = min_t(int, input_win->height, cfg->max_rsz_height); + if (dest_w == input_win->width && dest_h == input_win->height) { + max_rsz->width = dest_w; + max_rsz->height = dest_h; + } else { + max_rsz->width = min_t(int, input_win->width, cfg->max_rsz_width); + max_rsz->height = min_t(int, input_win->height, cfg->max_rsz_height); + } } else { /* scale up/down */ - max_rsz->width = cfg->max_rsz_width; - max_rsz->height = cfg->max_rsz_height; + if (dest_w == input_win->width && dest_h == input_win->height) { + max_rsz->width = dest_w; + max_rsz->height = dest_h; + } else { + max_rsz->width = cfg->max_rsz_width; + max_rsz->height = cfg->max_rsz_height; + } } } @@ -817,7 +828,7 @@ static int rkisp_set_fmt(struct rkisp_stream *stream, } /* do checks on resolution */ - restrict_rsz_resolution(stream, config, &max_rsz); + restrict_rsz_resolution(stream, pixm->width, pixm->height, &max_rsz); if (stream->id == RKISP_STREAM_MP || stream->id == RKISP_STREAM_SP || (stream->id == RKISP_STREAM_BP && dev->isp_ver != ISP_V30)) { @@ -1087,7 +1098,6 @@ static int rkisp_enum_framesizes(struct file *file, void *prov, struct v4l2_frmsizeenum *fsize) { struct rkisp_stream *stream = video_drvdata(file); - const struct stream_config *config = stream->config; struct v4l2_frmsize_stepwise *s = &fsize->stepwise; struct v4l2_frmsize_discrete *d = &fsize->discrete; struct rkisp_device *dev = stream->ispdev; @@ -1100,7 +1110,7 @@ static int rkisp_enum_framesizes(struct file *file, void *prov, if (!find_fmt(stream, fsize->pixel_format)) return -EINVAL; - restrict_rsz_resolution(stream, config, &max_rsz); + restrict_rsz_resolution(stream, 0, 0, &max_rsz); if (stream->out_isp_fmt.fmt_type == FMT_BAYER || stream->id == RKISP_STREAM_FBC || diff --git a/drivers/media/platform/rockchip/isp/capture_v35.c b/drivers/media/platform/rockchip/isp/capture_v35.c index 232cc1b797dd..62e6d557e221 100644 --- a/drivers/media/platform/rockchip/isp/capture_v35.c +++ b/drivers/media/platform/rockchip/isp/capture_v35.c @@ -760,6 +760,32 @@ static void update_mi(struct rkisp_stream *stream) rkisp_idx_write(dev, reg, val, ISP_UNITE_RIGHT, false); } + if (dev->unite_div == ISP_UNITE_DIV4) { + /* left bottom of image */ + reg = stream->config->mi.y_base_ad_init; + val = stream->next_buf->buff_addr[RKISP_PLANE_Y]; + val += (out_fmt->plane_fmt[0].bytesperline * out_fmt->height / 2); + rkisp_idx_write(dev, reg, val, ISP_UNITE_LEFT_B, false); + + reg = stream->config->mi.cb_base_ad_init; + val = stream->next_buf->buff_addr[RKISP_PLANE_CB]; + val += (out_fmt->plane_fmt[1].sizeimage / 2); + rkisp_idx_write(dev, reg, val, ISP_UNITE_LEFT_B, false); + + /* right bottom of image */ + reg = stream->config->mi.y_base_ad_init; + val = stream->next_buf->buff_addr[RKISP_PLANE_Y]; + val += (out_fmt->plane_fmt[0].bytesperline * out_fmt->height / 2) + + ((out_fmt->width / div) & ~0xf); + rkisp_idx_write(dev, reg, val, ISP_UNITE_RIGHT_B, false); + + reg = stream->config->mi.cb_base_ad_init; + val = stream->next_buf->buff_addr[RKISP_PLANE_CB]; + val += (out_fmt->plane_fmt[1].sizeimage / 2) + + ((out_fmt->width / div) & ~0xf); + rkisp_idx_write(dev, reg, val, ISP_UNITE_RIGHT_B, false); + } + if (stream->is_pause) { /* single sensor mode with pingpong buffer: * if mi on, addr will auto update at frame end @@ -1618,6 +1644,8 @@ static int rkisp_stream_init(struct rkisp_device *dev, u32 id) strscpy(vdev->name, SP_VDEV_NAME, sizeof(vdev->name)); stream->ops = &rkisp_sp_streams_ops; stream->config = &rkisp_sp_stream_cfg; + if (dev->hw_dev->unite) + stream->config->max_rsz_width *= 2; break; case RKISP_STREAM_VIR: strscpy(vdev->name, VIR_VDEV_NAME, sizeof(vdev->name)); @@ -1629,6 +1657,10 @@ static int rkisp_stream_init(struct rkisp_device *dev, u32 id) strscpy(vdev->name, MP_VDEV_NAME, sizeof(vdev->name)); stream->ops = &rkisp_mp_streams_ops; stream->config = &rkisp_mp_stream_cfg; + if (dev->hw_dev->unite) { + stream->config->max_rsz_width = CIF_ISP_INPUT_W_MAX_V35_UNITE; + stream->config->max_rsz_height = CIF_ISP_INPUT_H_MAX_V35_UNITE; + } } rockit_isp_ops.rkisp_stream_start = rkisp_stream_start; diff --git a/drivers/media/platform/rockchip/isp/isp_sditf.c b/drivers/media/platform/rockchip/isp/isp_sditf.c index fd2f02b6cf89..f38d0b73d12a 100644 --- a/drivers/media/platform/rockchip/isp/isp_sditf.c +++ b/drivers/media/platform/rockchip/isp/isp_sditf.c @@ -184,10 +184,7 @@ static long rkisp_sditf_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *ar rkisp_check_idle(sditf->isp, ISP_FRAME_VPSS); break; case RKISP_VPSS_GET_UNITE_MODE: - if (sditf->isp->unite_div == ISP_UNITE_DIV2) - *(unsigned int *)arg = sditf->isp->unite_div; - else - *(unsigned int *)arg = 0; + *(unsigned int *)arg = sditf->isp->unite_div - 1; break; case RKISP_VPSS_GET_ISP_WORKING: *(int *)arg = sditf->isp->hw_dev->is_runing; diff --git a/drivers/media/platform/rockchip/isp/isp_stats_v35.c b/drivers/media/platform/rockchip/isp/isp_stats_v35.c index 6d53d32891a4..e3ef0c607b74 100644 --- a/drivers/media/platform/rockchip/isp/isp_stats_v35.c +++ b/drivers/media/platform/rockchip/isp/isp_stats_v35.c @@ -629,17 +629,17 @@ rkisp_stats_send_meas(struct rkisp_isp_stats_vdev *stats_vdev) cur_stat_buf = cur_buf->vaddr[0]; } - /* buffer done when frame of right handle */ - if (dev->unite_div > ISP_UNITE_DIV1) { - if (dev->unite_index == ISP_UNITE_LEFT) { - cur_buf = NULL; - is_dummy = false; - } else if (cur_stat_buf) { - cur_stat_buf = (void *)cur_stat_buf + size / 2; - } + if (dev->unite_index > ISP_UNITE_LEFT && cur_stat_buf) + cur_stat_buf = (void *)cur_stat_buf + size / dev->unite_div * dev->unite_index; + if ((dev->unite_div == ISP_UNITE_DIV2 && dev->unite_index != ISP_UNITE_RIGHT) || + (dev->unite_div == ISP_UNITE_DIV4 && dev->unite_index != ISP_UNITE_RIGHT_B)) { + cur_buf = NULL; + is_dummy = false; } - if (dev->unite_div < ISP_UNITE_DIV2 || dev->unite_index == ISP_UNITE_RIGHT) { + if (dev->unite_div < ISP_UNITE_DIV2 || + (dev->unite_div == ISP_UNITE_DIV2 && dev->unite_index == ISP_UNITE_RIGHT) || + (dev->unite_div == ISP_UNITE_DIV4 && dev->unite_index == ISP_UNITE_RIGHT_B)) { /* config buf for next frame */ stats_vdev->cur_buf = NULL; if (stats_vdev->nxt_buf) { diff --git a/drivers/media/platform/rockchip/isp/procfs.c b/drivers/media/platform/rockchip/isp/procfs.c index b0e6fb56d17f..cc72834bea39 100644 --- a/drivers/media/platform/rockchip/isp/procfs.c +++ b/drivers/media/platform/rockchip/isp/procfs.c @@ -1377,14 +1377,16 @@ static int isp_show(struct seq_file *p, void *v) info, sdev->dbg.frameloss, dev->rdbk_cnt, dev->rdbk_cnt_x1, dev->rdbk_cnt_x2, dev->rdbk_cnt_x3, rkisp_stream_buf_cnt(stream)); - seq_printf(p, "\t hw link:%d idle:%d vir(mode:%d index:%d)\n", + seq_printf(p, "\t hw link:%d idle:%d vir(mode:%d index:%d) div:%d extend:%d\n", dev->hw_dev->dev_link_num, dev->hw_dev->is_idle, - dev->multi_mode, dev->multi_index); + dev->multi_mode, dev->multi_index, dev->unite_div, + dev->hw_dev->unite_extend_pixel); } else { - seq_printf(p, "%-10s frame:%d state:%s %s v-blank:%dus\n", + seq_printf(p, "%-10s frame:%d state:%s %s v-blank:%dus div:%d extend:%d\n", "Isp online", sdev->dbg.id, (dev->isp_state & ISP_FRAME_END) ? "idle" : "working", - info, sdev->dbg.delay / 1000); + info, sdev->dbg.delay / 1000, + dev->unite_div, dev->hw_dev->unite_extend_pixel); } if (dev->br_dev.en) seq_printf(p, "%-10s rkispp%d Format:%s%s Size:%dx%d (frame:%d rate:%dms frameloss:%d)\n", diff --git a/drivers/media/platform/rockchip/isp/rkisp.c b/drivers/media/platform/rockchip/isp/rkisp.c index d345ad34d6e1..6984ca43282e 100644 --- a/drivers/media/platform/rockchip/isp/rkisp.c +++ b/drivers/media/platform/rockchip/isp/rkisp.c @@ -241,8 +241,10 @@ int rkisp_align_sensor_resolution(struct rkisp_device *dev, CIF_ISP_INPUT_H_MAX_V33_UNITE : CIF_ISP_INPUT_H_MAX_V33; break; case ISP_V35: - max_w = CIF_ISP_INPUT_W_MAX_V35; - max_h = CIF_ISP_INPUT_H_MAX_V35; + max_w = dev->hw_dev->unite ? + CIF_ISP_INPUT_W_MAX_V35_UNITE : CIF_ISP_INPUT_W_MAX_V35; + max_h = dev->hw_dev->unite ? + CIF_ISP_INPUT_H_MAX_V35_UNITE : CIF_ISP_INPUT_H_MAX_V35; break; default: max_w = CIF_ISP_INPUT_W_MAX; @@ -2980,6 +2982,58 @@ err: return -EINVAL; } +static int rkisp_unite_div(struct rkisp_device *dev, u32 w, u32 h) +{ + struct rkisp_hw_dev *hw = dev->hw_dev; + u32 max_size, max_w, max_h; + + dev->unite_div = ISP_UNITE_DIV1; + if (hw->unite == ISP_UNITE_TWO && hw->isp_ver == ISP_V30) { + dev->unite_div = ISP_UNITE_DIV2; + return 0; + } + + switch (dev->isp_ver) { + case ISP_V30: + max_size = CIF_ISP_INPUT_W_MAX_V30 * CIF_ISP_INPUT_H_MAX_V30; + max_w = CIF_ISP_INPUT_W_MAX_V30; + max_h = max_size / w; + break; + case ISP_V32: + max_size = CIF_ISP_INPUT_W_MAX_V32 * CIF_ISP_INPUT_H_MAX_V32; + max_w = CIF_ISP_INPUT_W_MAX_V32; + max_h = max_size / w; + break; + case ISP_V32_L: + max_size = CIF_ISP_INPUT_W_MAX_V32_L * CIF_ISP_INPUT_H_MAX_V32_L; + max_w = CIF_ISP_INPUT_W_MAX_V32_L; + max_h = max_size / w; + break; + case ISP_V33: + max_size = CIF_ISP_INPUT_W_MAX_V33 * CIF_ISP_INPUT_H_MAX_V33; + max_w = CIF_ISP_INPUT_W_MAX_V33; + max_h = max_size / w; + break; + case ISP_V35: + max_size = CIF_ISP_INPUT_W_MAX_V35 * CIF_ISP_INPUT_H_MAX_V35; + max_w = CIF_ISP_INPUT_W_MAX_V35; + max_h = CIF_ISP_INPUT_H_MAX_V35; + break; + case ISP_V39: + max_size = CIF_ISP_INPUT_W_MAX_V39_UNITE / 2 * CIF_ISP_INPUT_H_MAX_V39_UNITE; + max_w = CIF_ISP_INPUT_W_MAX_V39; + max_h = max_size / w; + break; + default: + return -EINVAL; + } + if (w * h > max_size * 2 || h > max_h) + dev->unite_div = ISP_UNITE_DIV4; + else if (w * h > max_size || w > max_w) + dev->unite_div = ISP_UNITE_DIV2; + return 0; +} + static void rkisp_isp_sd_try_crop(struct v4l2_subdev *sd, struct v4l2_rect *crop, u32 pad) @@ -2987,8 +3041,6 @@ static void rkisp_isp_sd_try_crop(struct v4l2_subdev *sd, struct rkisp_isp_subdev *isp_sd = sd_to_isp_sd(sd); struct rkisp_device *dev = sd_to_isp_dev(sd); struct v4l2_rect in_crop = isp_sd->in_crop; - struct rkisp_hw_dev *hw = dev->hw_dev; - u32 size; crop->left = ALIGN(crop->left, 2); crop->width = ALIGN(crop->width, 2); @@ -2997,38 +3049,7 @@ static void rkisp_isp_sd_try_crop(struct v4l2_subdev *sd, /* update sensor info if sensor link be changed */ rkisp_update_sensor_info(dev); rkisp_align_sensor_resolution(dev, crop, true); - if (hw->unite == ISP_UNITE_TWO && hw->isp_ver == ISP_V30) { - dev->unite_div = ISP_UNITE_DIV2; - } else { - dev->unite_div = ISP_UNITE_DIV1; - switch (dev->isp_ver) { - case ISP_V30: - size = CIF_ISP_INPUT_W_MAX_V30 * CIF_ISP_INPUT_H_MAX_V30; - break; - case ISP_V32: - size = CIF_ISP_INPUT_W_MAX_V32 * CIF_ISP_INPUT_H_MAX_V32; - break; - case ISP_V32_L: - size = CIF_ISP_INPUT_W_MAX_V32_L * CIF_ISP_INPUT_H_MAX_V32_L; - break; - case ISP_V33: - size = CIF_ISP_INPUT_W_MAX_V33 * CIF_ISP_INPUT_H_MAX_V33; - break; - case ISP_V35: - size = CIF_ISP_INPUT_W_MAX_V35 * CIF_ISP_INPUT_H_MAX_V35; - break; - case ISP_V39: - size = CIF_ISP_INPUT_W_MAX_V39_UNITE * CIF_ISP_INPUT_H_MAX_V39_UNITE; - size /= 2; - break; - default: - return; - } - if (crop->width * crop->height > size * 2) - dev->unite_div = ISP_UNITE_DIV4; - else if (crop->width * crop->height > size) - dev->unite_div = ISP_UNITE_DIV2; - } + rkisp_unite_div(dev, crop->width, crop->height); } else if (pad == RKISP_ISP_PAD_SOURCE_PATH) { crop->left = clamp_t(u32, crop->left, 0, in_crop.width); crop->top = clamp_t(u32, crop->top, 0, in_crop.height); @@ -3105,8 +3126,10 @@ static int rkisp_isp_sd_get_selection(struct v4l2_subdev *sd, CIF_ISP_INPUT_H_MAX_V33_UNITE : CIF_ISP_INPUT_H_MAX_V33; break; case ISP_V35: - max_w = CIF_ISP_INPUT_W_MAX_V35; - max_h = CIF_ISP_INPUT_H_MAX_V35; + max_w = dev->hw_dev->unite ? + CIF_ISP_INPUT_W_MAX_V35_UNITE : CIF_ISP_INPUT_W_MAX_V35; + max_h = dev->hw_dev->unite ? + CIF_ISP_INPUT_H_MAX_V35_UNITE : CIF_ISP_INPUT_H_MAX_V35; break; case ISP_V39: max_w = dev->hw_dev->unite ? diff --git a/drivers/media/platform/rockchip/isp/rkisp.h b/drivers/media/platform/rockchip/isp/rkisp.h index 5b635b53c44d..9a3c8fc600a9 100644 --- a/drivers/media/platform/rockchip/isp/rkisp.h +++ b/drivers/media/platform/rockchip/isp/rkisp.h @@ -73,6 +73,8 @@ #define CIF_ISP_INPUT_H_MAX_V33_UNITE 2160 #define CIF_ISP_INPUT_W_MAX_V35 4096 #define CIF_ISP_INPUT_H_MAX_V35 3072 +#define CIF_ISP_INPUT_W_MAX_V35_UNITE 7168 +#define CIF_ISP_INPUT_H_MAX_V35_UNITE 5120 #define CIF_ISP_INPUT_W_MIN 272 #define CIF_ISP_INPUT_H_MIN 264 #define CIF_ISP_OUTPUT_W_MAX CIF_ISP_INPUT_W_MAX From bff036118ff5aa110cbed7a55b3cf106713fd208 Mon Sep 17 00:00:00 2001 From: Zhang Yubing Date: Mon, 7 Apr 2025 11:43:21 +0800 Subject: [PATCH 12/16] drm/rockchip: dw-dp: config traninig done flag when enable uboot logo When uboot logo is enabled, we think it has completed the link training in the uboot stage. so the cr done and eq done flag should be config. And the retraining will not be filter. Change-Id: Ibb68c3c6f42837568143f856c9f68fb8f882969a Signed-off-by: Zhang Yubing --- drivers/gpu/drm/rockchip/dw-dp.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/rockchip/dw-dp.c b/drivers/gpu/drm/rockchip/dw-dp.c index 53f55c73a229..4b79fa4cce6e 100644 --- a/drivers/gpu/drm/rockchip/dw-dp.c +++ b/drivers/gpu/drm/rockchip/dw-dp.c @@ -3294,6 +3294,8 @@ static void _dw_dp_loader_protect(struct dw_dp *dp, bool on) extcon_set_state_sync(dp->audio->extcon, EXTCON_DISP_DP, true); dw_dp_audio_handle_plugged_change(dp->audio, true); phy_power_on(dp->phy); + link->train.clock_recovered = true; + link->train.channel_equalized = true; } else { phy_power_off(dp->phy); extcon_set_state_sync(dp->audio->extcon, EXTCON_DISP_DP, false); From 6af2d14c6b17b77871b1e2c6fe748b782551e269 Mon Sep 17 00:00:00 2001 From: Zhibin Huang Date: Wed, 2 Jul 2025 19:49:32 +0800 Subject: [PATCH 13/16] input: touchscreen: gt1x: disable async probe for multi-TP Disable async probe if CONFIG_TOUCHSCREEN_HYN is enabled, since the EVB requires sequential probing of both gt1x and hyn touchscreen drivers. Type: Function Redmine ID: #N/A Associated modifications: N/A Test: N/A Signed-off-by: Zhibin Huang Change-Id: I4610e82d478aa328c0459bec8e9ce270644e3a1b --- drivers/input/touchscreen/gt1x/gt1x.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/input/touchscreen/gt1x/gt1x.c b/drivers/input/touchscreen/gt1x/gt1x.c index 32e5d1f5851c..8a057ca85637 100644 --- a/drivers/input/touchscreen/gt1x/gt1x.c +++ b/drivers/input/touchscreen/gt1x/gt1x.c @@ -795,7 +795,9 @@ static struct i2c_driver gt1x_ts_driver = { #if !defined(CONFIG_FB) && !defined(CONFIG_HAS_EARLYSUSPEND) && defined(CONFIG_PM) .pm = >1x_ts_pm_ops, #endif +#if !IS_REACHABLE(CONFIG_TOUCHSCREEN_HYN) .probe_type = PROBE_PREFER_ASYNCHRONOUS, +#endif }, }; From 77234413d3b2d9be39e6772e00c2f6d004c39925 Mon Sep 17 00:00:00 2001 From: Zhibin Huang Date: Wed, 2 Jul 2025 11:43:49 +0800 Subject: [PATCH 14/16] input: touchscreen: hyn: reduce logs Type: Function Redmine ID: #N/A Associated modifications: N/A Test: N/A Signed-off-by: Zhibin Huang Change-Id: I3bb19f2cfdd6bcfa4978818ba52ad4097a2d782b --- drivers/input/touchscreen/hyn/hyn_core.c | 17 +++++++++-------- drivers/input/touchscreen/hyn/hyn_core.h | 11 ++++++----- .../input/touchscreen/hyn/hyn_lib/hyn_fs_node.c | 2 +- 3 files changed, 16 insertions(+), 14 deletions(-) diff --git a/drivers/input/touchscreen/hyn/hyn_core.c b/drivers/input/touchscreen/hyn/hyn_core.c index c36e6a201b93..a509c19841fa 100644 --- a/drivers/input/touchscreen/hyn/hyn_core.c +++ b/drivers/input/touchscreen/hyn/hyn_core.c @@ -17,6 +17,7 @@ #include "hyn_core.h" #define HYN_DRIVER_NAME "hyn_ts" +u8 hyn_log_level; static struct hyn_ts_data *hyn_data = NULL; static const struct hyn_ts_fuc* hyn_fun = NULL; static const struct of_device_id hyn_of_match_table[] = { @@ -88,14 +89,14 @@ static int hyn_parse_dt(struct hyn_ts_data *ts_data) if (IS_ERR(dt->reset_gpio)) { ret = PTR_ERR(dt->reset_gpio); HYN_ERROR("failed to request reset GPIO: %d\n", ret); - return -EPROBE_DEFER; + return ret; } dt->irq_gpio = devm_gpiod_get(dev, "irq", GPIOD_ASIS); if (IS_ERR(dt->irq_gpio)) { ret = PTR_ERR(dt->irq_gpio); HYN_ERROR("failed to request irq GPIO: %d\n", ret); - return -EPROBE_DEFER; + return ret; } //pin_ctl ret =-1; @@ -680,7 +681,7 @@ static int hyn_ts_probe(struct spi_device *client) ts_data->bus_type = bus_type; ts_data->rp_buf.key_id = 0xFF; ts_data->work_mode = NOMAL_MODE; - ts_data->log_level = 0; + hyn_log_level = 0; hyn_data = ts_data; ts_data->client = client; @@ -869,7 +870,7 @@ static int hyn_ts_remove(struct spi_device *client) hyn_esdcheck_switch(ts_data,DISABLE); destroy_workqueue(ts_data->hyn_workqueue); } - HYN_INFO("ts_remove1"); + HYN_INFO2("ts_remove1"); #if (HYN_APK_DEBUG_EN) hyn_tool_fs_exit(); #endif @@ -878,11 +879,11 @@ static int hyn_ts_remove(struct spi_device *client) hyn_gesture_exit(ts_data); #endif hyn_release_sysfs(ts_data); - HYN_INFO("ts_remove2"); + HYN_INFO2("ts_remove2"); if (!IS_ERR_OR_NULL(ts_data->input_dev)) { input_unregister_device(ts_data->input_dev); } - HYN_INFO("ts_remove3"); + HYN_INFO2("ts_remove3"); #if 0 #if defined(CONFIG_FB) fb_unregister_client(&ts_data->fb_notif); @@ -904,7 +905,7 @@ static int hyn_ts_remove(struct spi_device *client) if (!IS_ERR_OR_NULL(ts_data->plat_data.vdd_i2c)) { regulator_put(ts_data->plat_data.vdd_i2c); } - HYN_INFO("ts_remove4"); + HYN_INFO2("ts_remove4"); #if (I2C_USE_DMA==2) if (!IS_ERR_OR_NULL(ts_data->dma_buff_va)) { dma_free_coherent(NULL, 2048, ts_data->dma_buff_va, ts_data->dma_buff_pa); @@ -912,7 +913,7 @@ static int hyn_ts_remove(struct spi_device *client) #endif kfree(ts_data); hyn_data = NULL; - HYN_INFO("ts_remove5"); + HYN_INFO2("ts_remove5"); } #if KERNEL_VERSION(6, 1, 0) > LINUX_VERSION_CODE return 0; diff --git a/drivers/input/touchscreen/hyn/hyn_core.h b/drivers/input/touchscreen/hyn/hyn_core.h index 153047d5aa59..99d509a03ae5 100644 --- a/drivers/input/touchscreen/hyn/hyn_core.h +++ b/drivers/input/touchscreen/hyn/hyn_core.h @@ -87,12 +87,13 @@ // #define __noscs __attribute__((__no_sanitize__("shadow-call-stack"))) +extern u8 hyn_log_level; #define HYN_INFO(fmt, args...) printk(KERN_INFO "[HYN]"fmt"\n", ##args) -#define HYN_INFO2(fmt, args...) if(hyn_data->log_level > 0)printk(KERN_INFO "[HYN]"fmt"\n", ##args) -#define HYN_INFO3(fmt, args...) if(hyn_data->log_level > 1)printk(KERN_INFO "[HYN]"fmt"\n", ##args) -#define HYN_INFO4(fmt, args...) if(hyn_data->log_level > 2)printk(KERN_INFO "[HYN]"fmt"\n", ##args) -#define HYN_ERROR(fmt, args...) printk(KERN_ERR "[HYN][Error]%s:"fmt"\n",__func__,##args) -#define HYN_ENTER() printk(KERN_ERR "[HYN][enter]%s\n",__func__) +#define HYN_INFO2(fmt, args...) if (hyn_log_level > 0) printk(KERN_INFO "[HYN]"fmt"\n", ##args) +#define HYN_INFO3(fmt, args...) if (hyn_log_level > 1) printk(KERN_INFO "[HYN]"fmt"\n", ##args) +#define HYN_INFO4(fmt, args...) if (hyn_log_level > 2) printk(KERN_INFO "[HYN]"fmt"\n", ##args) +#define HYN_ERROR(fmt, args...) printk(KERN_ERR "[HYN][Error]%s:"fmt"\n", __func__, ##args) +#define HYN_ENTER() HYN_INFO2("[enter]%s\n", __func__) #if HYN_GKI_VER // MODULE_IMPORT_NS(VFS_internal_I_am_really_a_filesystem_and_am_NOT_a_driver); diff --git a/drivers/input/touchscreen/hyn/hyn_lib/hyn_fs_node.c b/drivers/input/touchscreen/hyn/hyn_lib/hyn_fs_node.c index d83f57ac096b..76040ef2b2ef 100644 --- a/drivers/input/touchscreen/hyn/hyn_lib/hyn_fs_node.c +++ b/drivers/input/touchscreen/hyn/hyn_lib/hyn_fs_node.c @@ -160,7 +160,7 @@ static ssize_t hyn_dbg_store(struct device *dev,struct device_attribute *attr,c } else if(0 == strcmp(str,"log")){ hyn_get_word(&next_ptr,str); - hyn_fs_data->log_level = (u8)(str[0]-'0'); + hyn_log_level = (u8)(str[0]-'0'); } else if(0 == strcmp(str,"workmode")){ ret = hyn_get_word(&next_ptr,str); From 319229602927ef34c6d3bca9a85bb8d7d324d9ce Mon Sep 17 00:00:00 2001 From: Damon Ding Date: Tue, 1 Jul 2025 17:34:42 +0800 Subject: [PATCH 15/16] pwm: rockchip: Add comments for why to add delay before disabling the dclk for PWM v4 Fixes: 42e759004f12 ("pwm: rockchip: add one period delay before disabling the dclk") Change-Id: I612fde2adf60940e17146a115a104caf302109b2 Signed-off-by: Damon Ding --- drivers/pwm/pwm-rockchip.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/pwm/pwm-rockchip.c b/drivers/pwm/pwm-rockchip.c index 0037c4046efa..5c4c5669eec5 100644 --- a/drivers/pwm/pwm-rockchip.c +++ b/drivers/pwm/pwm-rockchip.c @@ -873,6 +873,11 @@ static int rockchip_pwm_enable_v4(struct pwm_chip *chip, struct pwm_device *pwm, writel_relaxed(PWM_EN(enable) | PWM_CLK_EN(enable), pc->base + ENABLE); + /* + * For pwm v4, the disable operation, which sets polarity to inactive state, + * will not take effect until the end of current period. Therefore, it makes + * sense to delay one period before disabling the dclk. + */ if (!enable) { pwm_get_state(pwm, &curstate); delay_us = DIV_ROUND_UP_ULL(curstate.period, NSEC_PER_USEC); From 927ec427493fb894ed3ca7a17174cb7ddcbc7dba Mon Sep 17 00:00:00 2001 From: Damon Ding Date: Tue, 1 Jul 2025 17:29:26 +0800 Subject: [PATCH 16/16] pwm: rockchip: Add &rockchip_pwm_chip.oneshot_valid to indicate validity of configurations In the past, the flag &rockchip_pwm_chip.oneshot_en may not represent the accurate enabled status for oneshot mode, because the oneshot mode should be active after setting the 'pwm_en' bit. Therefore, we add the &rockchip_pwm_chip.oneshot_valid to represent the validity of oneshot configurations, and &rockchip_pwm_chip.oneshot_en does what it should do. In addition, the disabling of oneshot mode does not need to delay one period(related commit 42e759004f12 ("pwm: rockchip: add one period delay before disabling the dclk")). It will end after the last period sent. What's more serious, the disabling process may be done in interrupt handler for oneshot mode(The handler is flexible for user as designed), so it is unreasonable to call fsleep() in the interrupt handler, which may cause the following error with 100000ns period: [ 6.517981] BUG: scheduling while atomic: swapper/0/0/0x00010000 [ 6.518045] Modules linked in: [ 6.518060] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 6.1.118 #944 [ 6.518069] Hardware name: Rockchip RK3576 EVB1 V10 Board (DT) [ 6.518078] Call trace: [ 6.518085] dump_backtrace+0xd8/0x130 [ 6.518108] show_stack+0x1c/0x30 [ 6.518118] dump_stack_lvl+0x64/0x7c [ 6.518132] dump_stack+0x14/0x2c [ 6.518141] __schedule_bug+0x58/0x70 [ 6.518155] __schedule+0x6f0/0x7c0 [ 6.518164] schedule+0x54/0xe0 [ 6.518172] schedule_hrtimeout_range_clock+0xa8/0x144 [ 6.518184] schedule_hrtimeout_range+0x18/0x20 [ 6.518193] usleep_range_state+0x7c/0xb0 [ 6.518204] rockchip_pwm_enable_v4+0xc8/0x104 [ 6.518219] rockchip_pwm_apply+0x80/0x190 [ 6.518229] pwm_apply_state+0x68/0x190 [ 6.518239] rockchip_pwm_irq_v4+0x7c/0x1b0 [ 6.518250] __handle_irq_event_percpu+0x58/0x1d0 [ 6.518265] handle_irq_event+0x4c/0x110 [ 6.518276] handle_fasteoi_irq+0xc0/0x24c [ 6.518290] generic_handle_domain_irq+0x30/0x44 [ 6.518302] gic_handle_irq+0x60/0x90 [ 6.518312] call_on_irq_stack+0x24/0x34 [ 6.518323] do_interrupt_handler+0x80/0x94 [ 6.518333] el1_interrupt+0x44/0xa0 [ 6.518345] el1h_64_irq_handler+0x14/0x20 [ 6.518357] el1h_64_irq+0x74/0x78 [ 6.518366] cpuidle_enter_state+0xbc/0x434 [ 6.518382] cpuidle_enter+0x3c/0x50 [ 6.518393] do_idle+0x228/0x2b0 [ 6.518405] cpu_startup_entry+0x38/0x40 [ 6.518416] kernel_init+0x0/0x12c [ 6.518425] arch_post_acpi_subsys_init+0x0/0x18 [ 6.518439] start_kernel+0x6b0/0x6ec [ 6.518450] __primary_switched+0xb4/0xbc This patch will also help to avoid the above abnormal situation. Change-Id: I0df715921d79803f06329a71b966a4ae40876f33 Signed-off-by: Damon Ding --- drivers/pwm/pwm-rockchip.c | 25 +++++++++++++++---------- 1 file changed, 15 insertions(+), 10 deletions(-) diff --git a/drivers/pwm/pwm-rockchip.c b/drivers/pwm/pwm-rockchip.c index 5c4c5669eec5..19a158a077c3 100644 --- a/drivers/pwm/pwm-rockchip.c +++ b/drivers/pwm/pwm-rockchip.c @@ -321,6 +321,7 @@ struct rockchip_pwm_chip { unsigned long is_clk_enabled; bool vop_pwm_en; /* indicate voppwm mirror register state */ bool center_aligned; + bool oneshot_valid; bool oneshot_en; bool capture_en; bool wave_en; @@ -561,7 +562,7 @@ static void rockchip_pwm_config_v1(struct pwm_chip *chip, struct pwm_device *pwm ctrl &= ~PWM_CLK_SEL_MASK; ctrl |= PWM_SEL_SCALED_CLOCK; - pc->oneshot_en = true; + pc->oneshot_valid = true; ctrl &= ~PWM_MODE_MASK; ctrl |= PWM_ONESHOT; @@ -584,7 +585,7 @@ static void rockchip_pwm_config_v1(struct pwm_chip *chip, struct pwm_device *pwm dev_err(chip->dev, "Oneshot_count must be between 1 and %d.\n", pc->data->oneshot_cnt_max); - pc->oneshot_en = false; + pc->oneshot_valid = false; ctrl &= ~PWM_MODE_MASK; ctrl |= PWM_CONTINUOUS; @@ -651,7 +652,7 @@ static int rockchip_pwm_enable_v1(struct pwm_chip *chip, struct pwm_device *pwm, val |= PWM_OUTPUT_CENTER; } - if (pc->oneshot_en) { + if (pc->oneshot_valid) { enable_conf &= ~PWM_MODE_MASK; enable_conf |= PWM_ONESHOT; } else if (pc->capture_en) { @@ -679,6 +680,8 @@ static int rockchip_pwm_enable_v1(struct pwm_chip *chip, struct pwm_device *pwm, if (!enable) clk_disable(pc->clk); + pc->oneshot_en = pc->oneshot_valid ? enable : false; + return 0; } @@ -830,17 +833,17 @@ static void rockchip_pwm_config_v4(struct pwm_chip *chip, struct pwm_device *pwm state->duty_cycle, state->period); } - pc->oneshot_en = true; + pc->oneshot_valid = true; } else { if (state->oneshot_count) dev_err(chip->dev, "Oneshot_count must be between 1 and %d.\n", pc->data->oneshot_cnt_max); - pc->oneshot_en = false; + pc->oneshot_valid = false; } #endif - if (pc->oneshot_en) { + if (pc->oneshot_valid) { writel_relaxed(PWM_MODE(ONESHOT_MODE) | PWM_ALIGNED_INVALID(true), pc->base + CTRL_V4); writel_relaxed(offset, pc->base + OFFSET); @@ -874,17 +877,19 @@ static int rockchip_pwm_enable_v4(struct pwm_chip *chip, struct pwm_device *pwm, writel_relaxed(PWM_EN(enable) | PWM_CLK_EN(enable), pc->base + ENABLE); /* - * For pwm v4, the disable operation, which sets polarity to inactive state, - * will not take effect until the end of current period. Therefore, it makes - * sense to delay one period before disabling the dclk. + * For pwm v4, the disable operation of continuous mode, which sets polarity + * to inactive state, will not take effect until the end of current period. + * Therefore, it makes sense to delay one period before disabling the dclk. */ - if (!enable) { + if (!enable && !pc->oneshot_en) { pwm_get_state(pwm, &curstate); delay_us = DIV_ROUND_UP_ULL(curstate.period, NSEC_PER_USEC); fsleep(delay_us); clk_disable(pc->clk); } + pc->oneshot_en = pc->oneshot_valid ? enable : false; + return 0; }