From 5beeda4a26c1e79defd4a54d5653561a33a7a1a8 Mon Sep 17 00:00:00 2001 From: Wyon Bi Date: Thu, 9 Jul 2020 16:05:27 +0800 Subject: [PATCH] drm/bridge: analogix_dp: Add loader protect for psr function Change-Id: Iffb651d3dbb11797b82ed2679e990b8c9610b200 Signed-off-by: Wyon Bi --- .../drm/bridge/analogix/analogix_dp_core.c | 21 +++++++++++++++++-- .../gpu/drm/rockchip/analogix_dp-rockchip.c | 4 ++++ 2 files changed, 23 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c index af86736374a3..17775438281e 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c @@ -1154,13 +1154,30 @@ analogix_dp_best_encoder(struct drm_connector *connector) static int analogix_dp_loader_protect(struct drm_connector *connector, bool on) { struct analogix_dp_device *dp = to_dp(connector); + int ret; if (dp->plat_data->panel) drm_panel_loader_protect(dp->plat_data->panel, on); - if (on) + if (on) { pm_runtime_get_sync(dp->dev); - else + + ret = analogix_dp_detect_sink_psr(dp); + if (ret) + return ret; + + /* Check whether panel supports fast training */ + ret = analogix_dp_fast_link_train_detection(dp); + if (ret) + dp->psr_enable = false; + + if (dp->psr_enable) { + ret = analogix_dp_enable_sink_psr(dp); + if (ret) + return ret; + } + } else { pm_runtime_put(dp->dev); + } return 0; } diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c index 9a666179395f..fa629b1d61fe 100644 --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c @@ -299,7 +299,11 @@ static int rockchip_dp_drm_encoder_loader_protect(struct drm_encoder *encoder, } clk_prepare_enable(dp->pclk); + + rockchip_drm_psr_inhibit_put(&dp->encoder); } else { + rockchip_drm_psr_inhibit_get(&dp->encoder); + clk_disable_unprepare(dp->pclk); if (dp->vccio_supply)