media: ar0521: don't overflow when checking PLL values

commit 438d3085ba5b8b5bfa5290faa594e577f6ac9aa7 upstream.

The PLL checks are comparing 64 bit integers with 32 bit
ones, as reported by Coverity. Depending on the values of
the variables, this may underflow.

Fix it ensuring that both sides of the expression are u64.

Fixes: 852b50aeed ("media: On Semi AR0521 sensor driver")
Cc: stable@vger.kernel.org
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Mauro Carvalho Chehab
2024-10-15 11:38:10 +02:00
committed by Greg Kroah-Hartman
parent 4f1d74f747
commit 5e1523076a

View File

@@ -223,10 +223,10 @@ static u32 calc_pll(struct ar0521_dev *sensor, int num, u32 freq, u16 *pre_ptr,
continue; /* Minimum value */ continue; /* Minimum value */
if (new_mult > 254) if (new_mult > 254)
break; /* Maximum, larger pre won't work either */ break; /* Maximum, larger pre won't work either */
if (sensor->extclk_freq * (u64)new_mult < AR0521_PLL_MIN * if (sensor->extclk_freq * (u64)new_mult < (u64)AR0521_PLL_MIN *
new_pre) new_pre)
continue; continue;
if (sensor->extclk_freq * (u64)new_mult > AR0521_PLL_MAX * if (sensor->extclk_freq * (u64)new_mult > (u64)AR0521_PLL_MAX *
new_pre) new_pre)
break; /* Larger pre won't work either */ break; /* Larger pre won't work either */
new_pll = div64_round_up(sensor->extclk_freq * (u64)new_mult, new_pll = div64_round_up(sensor->extclk_freq * (u64)new_mult,