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@@ -127,92 +127,6 @@
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status = "okay";
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};
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isp0: isp@ff910000 {
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compatible = "rockchip,rk3399-isp", "rockchip,isp";
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reg = <0x0 0xff910000 0x0 0x4000>;
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interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
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clocks =
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<&cru SCLK_CIF_OUT>, <&cru SCLK_CIF_OUT>,
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<&cru SCLK_DPHY_TX1RX1_CFG>, <&cru SCLK_MIPIDPHY_REF>,
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<&cru ACLK_ISP0_NOC>, <&cru ACLK_ISP0_WRAPPER>,
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<&cru HCLK_ISP0_NOC>, <&cru HCLK_ISP0_WRAPPER>,
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<&cru SCLK_ISP0>, <&cru SCLK_DPHY_RX0_CFG>;
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clock-names =
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"clk_cif_out", "clk_cif_pll",
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"pclk_dphytxrx", "pclk_dphy_ref",
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"aclk_isp0_noc", "aclk_isp0_wrapper",
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"hclk_isp0_noc", "hclk_isp0_wrapper",
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"clk_isp0", "pclk_dphyrx";
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pinctrl-names =
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"cif_clkout", "isp_dvp8bit0", "isp_mipi_fl",
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"isp_mipi_fl_prefl", "isp_flash_as_gpio",
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"isp_flash_as_trigger_out";
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pinctrl-0 = <&cif_clkout>;
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pinctrl-1 = <&cif_clkout &isp_dvp_d0d7>;
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pinctrl-2 = <&cif_clkout>;
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pinctrl-3 = <&cif_clkout &isp_prelight>;
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pinctrl-4 = <&isp_flash_trigger_as_gpio>;
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pinctrl-5 = <&isp_flash_trigger>;
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rockchip,isp,mipiphy = <2>;
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rockchip,isp,cifphy = <1>;
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rockchip,isp,dsiphy,reg = <0xff968000 0x8000>;
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rockchip,grf = <&grf>;
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rockchip,cru = <&cru>;
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rockchip,gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
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rockchip,isp,iommu-enable = <1>;
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power-domains = <&power RK3399_PD_ISP0>;
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iommus = <&isp0_mmu>;
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status = "disabled";
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};
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isp1: isp@ff920000 {
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compatible = "rockchip,rk3399-isp", "rockchip,isp";
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reg = <0x0 0xff920000 0x0 0x4000>;
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interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>;
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clocks =
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<&cru ACLK_ISP1_NOC>, <&cru ACLK_ISP1_WRAPPER>,
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<&cru HCLK_ISP1_NOC>, <&cru HCLK_ISP1_WRAPPER>,
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<&cru SCLK_ISP1>, <&cru SCLK_CIF_OUT>,
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<&cru SCLK_CIF_OUT>, <&cru SCLK_DPHY_TX1RX1_CFG>,
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<&cru SCLK_MIPIDPHY_REF>, <&cru PCLK_ISP1_WRAPPER>,
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<&cru SCLK_DPHY_RX0_CFG>, <&cru PCLK_MIPI_DSI1>,
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<&cru SCLK_MIPIDPHY_CFG>;
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clock-names =
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"aclk_isp1_noc", "aclk_isp1_wrapper",
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"hclk_isp1_noc", "hclk_isp1_wrapper",
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"clk_isp1", "clk_cif_out",
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"clk_cif_pll", "pclk_dphytxrx",
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"pclk_dphy_ref", "pclk_isp1",
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"pclk_dphyrx", "pclk_mipi_dsi",
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"mipi_dphy_cfg";
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pinctrl-names =
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"cif_clkout", "isp_dvp8bit0", "isp_mipi_fl",
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"isp_mipi_fl_prefl", "isp_flash_as_gpio",
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"isp_flash_as_trigger_out";
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pinctrl-0 = <&cif_clkout>;
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pinctrl-1 = <&cif_clkout &isp_dvp_d0d7>;
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pinctrl-2 = <&cif_clkout>;
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pinctrl-3 = <&isp_prelight>;
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pinctrl-4 = <&isp_flash_trigger_as_gpio>;
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pinctrl-5 = <&isp_flash_trigger>;
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rockchip,isp,mipiphy = <2>;
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rockchip,isp,cifphy = <1>;
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rockchip,isp,dsiphy,reg = <0xff968000 0x8000>;
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rockchip,grf = <&grf>;
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rockchip,cru = <&cru>;
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rockchip,gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
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rockchip,isp,iommu-enable = <1>;
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power-domains = <&power RK3399_PD_ISP1>;
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iommus = <&isp1_mmu>;
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status = "disabled";
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};
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uboot-charge {
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compatible = "rockchip,uboot-charge";
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rockchip,uboot-charge-on = <1>;
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rockchip,android-charge-on = <0>;
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};
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hdmi_dp_sound: hdmi-dp-sound {
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status = "disabled";
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compatible = "rockchip,rk3399-hdmi-dp";
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@@ -381,30 +295,6 @@
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/*cif_clkin*/
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<2 10 RK_FUNC_3 &pcfg_pull_none>;
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};
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isp_shutter: isp-shutter {
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rockchip,pins =
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/*SHUTTEREN*/
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<1 1 RK_FUNC_1 &pcfg_pull_none>,
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/*SHUTTERTRIG*/
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<1 0 RK_FUNC_1 &pcfg_pull_none>;
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};
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isp_flash_trigger: isp-flash-trigger {
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/*ISP_FLASHTRIGOU*/
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rockchip,pins = <1 3 RK_FUNC_1 &pcfg_pull_none>;
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};
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isp_prelight: isp-prelight {
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/*ISP_PRELIGHTTRIG*/
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rockchip,pins = <1 4 RK_FUNC_1 &pcfg_pull_none>;
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};
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isp_flash_trigger_as_gpio: isp_flash_trigger_as_gpio {
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/*ISP_FLASHTRIGOU*/
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rockchip,pins =
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<1 3 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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buttons {
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