From 6097c07d909b49dbe6bfb2c88f395fa04c54f82e Mon Sep 17 00:00:00 2001 From: Emil Renner Berthing Date: Wed, 31 Oct 2018 11:57:00 +0100 Subject: [PATCH] UPSTREAM: spi: rockchip: always use SPI mode The hardware supports 3 different variants of SPI and there were some code around it, but nothing to actually set it to anything but "Motorola SPI". Just drop that code and always use that mode. Change-Id: I53d65943b80abea21f3bf35b440d56dc8a1190de Signed-off-by: Emil Renner Berthing Tested-by: Heiko Stuebner Signed-off-by: Mark Brown Signed-off-by: Jon Lin (cherry picked from commit 2410d6a3c3070e205169a1a741aa78898e30a642) --- drivers/spi/spi-rockchip.c | 17 ++++------------- 1 file changed, 4 insertions(+), 13 deletions(-) diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index 45b51ffd2cbe..dd215016a4f8 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -163,12 +163,6 @@ #define ROCKCHIP_SPI_VER2_TYPE1 0x05EC0002 #define ROCKCHIP_SPI_VER2_TYPE2 0x00110002 -enum rockchip_ssi_type { - SSI_MOTO_SPI = 0, - SSI_TI_SSP, - SSI_NS_MICROWIRE, -}; - struct rockchip_spi_dma_data { struct dma_chan *ch; dma_addr_t addr; @@ -186,8 +180,6 @@ struct rockchip_spi { u32 fifo_len; /* max bus freq supported */ u32 max_freq; - /* supported slave numbers */ - enum rockchip_ssi_type type; u16 mode; u8 tmode; @@ -547,14 +539,14 @@ static void rockchip_spi_config(struct rockchip_spi *rs) u32 dmacr = 0; int rsd = 0; - u32 cr0 = (CR0_BHT_8BIT << CR0_BHT_OFFSET) - | (CR0_SSD_ONE << CR0_SSD_OFFSET) - | (CR0_EM_BIG << CR0_EM_OFFSET); + u32 cr0 = CR0_FRF_SPI << CR0_FRF_OFFSET + | CR0_BHT_8BIT << CR0_BHT_OFFSET + | CR0_SSD_ONE << CR0_SSD_OFFSET + | CR0_EM_BIG << CR0_EM_OFFSET; cr0 |= (rs->n_bytes << CR0_DFS_OFFSET); cr0 |= ((rs->mode & 0x3) << CR0_SCPH_OFFSET); cr0 |= (rs->tmode << CR0_XFM_OFFSET); - cr0 |= (rs->type << CR0_FRF_OFFSET); if (rs->use_dma) { if (rs->tx) @@ -745,7 +737,6 @@ static int rockchip_spi_probe(struct platform_device *pdev) spi_enable_chip(rs, false); - rs->type = SSI_MOTO_SPI; rs->master = master; rs->dev = &pdev->dev; rs->max_freq = clk_get_rate(rs->spiclk);