1.Optimizing operational processes SDMMC.
2.Eliminate the normal error message.
This commit is contained in:
xbw
2014-03-14 16:22:19 +08:00
parent 589800e744
commit 60dd287519
4 changed files with 50 additions and 13 deletions

25
drivers/mmc/core/core.c Normal file → Executable file
View File

@@ -2369,6 +2369,7 @@ static int mmc_rescan_try_freq(struct mmc_host *host, unsigned freq)
* if the card is being re-initialized, just send it. CMD52
* should be ignored by SD/eMMC cards.
*/
#if 0
sdio_reset(host);
mmc_go_idle(host);
@@ -2381,6 +2382,30 @@ static int mmc_rescan_try_freq(struct mmc_host *host, unsigned freq)
return 0;
if (!mmc_attach_mmc(host))
return 0;
#else
/*
* Simplifying the process of initializing the card.
* modifyed by xbw, at 2014-03-14
*/
if(host->restrict_caps & RESTRICT_CARD_TYPE_SDIO)
sdio_reset(host);
mmc_go_idle(host);
if(host->restrict_caps & (RESTRICT_CARD_TYPE_SDIO |RESTRICT_CARD_TYPE_SD))
mmc_send_if_cond(host, host->ocr_avail);
/* Order's important: probe SDIO, then SD, then MMC */
if ((host->restrict_caps &RESTRICT_CARD_TYPE_SDIO) && !mmc_attach_sdio(host))
return 0;
if ((host->restrict_caps &RESTRICT_CARD_TYPE_SD) && !mmc_attach_sd(host))
return 0;
if ((host->restrict_caps &(RESTRICT_CARD_TYPE_EMMC|RESTRICT_CARD_TYPE_SD)) && !mmc_attach_mmc(host))
return 0;
#endif
mmc_power_off(host);
return -EIO;

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@@ -58,9 +58,9 @@
#define DW_MCI_FREQ_MAX 50000000//200000000 /* unit: HZ */
#define DW_MCI_FREQ_MIN 300000//400000 /* unit: HZ */
#define SDMMC_DATA_TIMEOUT_SD 500000; /*max is 250ms refer to Spec; Maybe adapt the value to the sick card.*/
#define SDMMC_DATA_TIMEOUT_SDIO 250000
#define SDMMC_DATA_TIMEOUT_EMMC 2500000
#define SDMMC_DATA_TIMEOUT_SD 500; /*max is 250ms refer to Spec; Maybe adapt the value to the sick card.*/
#define SDMMC_DATA_TIMEOUT_SDIO 250
#define SDMMC_DATA_TIMEOUT_EMMC 2500
#ifdef CONFIG_MMC_DW_IDMAC
#define IDMAC_INT_CLR (SDMMC_IDMAC_INT_AI | SDMMC_IDMAC_INT_NI | \
@@ -856,8 +856,15 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot, bool force_clkinit)
host->current_speed = clock;
if(slot->ctype != slot->pre_ctype)
MMC_DBG_BOOT_FUNC("Bus speed=%dHz,Bus width=%s.[%s]", \
div ? ((host->bus_hz / div) >> 1):host->bus_hz, \
(slot->ctype == SDMMC_CTYPE_4BIT)?"4bits":"8bits", mmc_hostname(host->mmc));
slot->pre_ctype = slot->ctype;
/* Set the current slot bus width */
mci_writel(host, CTYPE, (slot->ctype << slot->id));
}
static void dw_mci_wait_unbusy(struct dw_mci *host)
@@ -1013,6 +1020,7 @@ static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
#endif
default:
/* set default 1 bit mode */
slot->ctype = SDMMC_CTYPE_1BIT;
slot->pre_ctype = SDMMC_CTYPE_1BIT;
}
@@ -1335,8 +1343,9 @@ static void dw_mci_command_complete(struct dw_mci *host, struct mmc_command *cmd
cmd->error = 0;
MMC_DBG_CMD_FUNC(" command complete, cmd=%d,cmdError=0x%x [%s]",cmd->opcode, cmd->error,mmc_hostname(host->mmc));
if (cmd->error) {
MMC_DBG_ERR_FUNC(" command complete, cmd=%d,cmdError=0x%x [%s]",\
if (cmd->error) {
if(MMC_SEND_STATUS != cmd->opcode)
MMC_DBG_ERR_FUNC(" command complete, cmd=%d,cmdError=0x%x [%s]",\
cmd->opcode, cmd->error,mmc_hostname(host->mmc));
/* newer ip versions need a delay between retries */
@@ -1348,6 +1357,7 @@ static void dw_mci_command_complete(struct dw_mci *host, struct mmc_command *cmd
static void dw_mci_tasklet_func(unsigned long priv)
{
struct dw_mci *host = (struct dw_mci *)priv;
struct dw_mci_slot *slot = mmc_priv(host->mmc);
struct mmc_data *data;
struct mmc_command *cmd;
@@ -1447,9 +1457,11 @@ static void dw_mci_tasklet_func(unsigned long priv)
host->data = NULL;
set_bit(EVENT_DATA_COMPLETE, &host->completed_events);
status = host->data_status;
if (status & DW_MCI_DATA_ERROR_FLAGS) {
MMC_DBG_ERR_FUNC("Pre-state[%d]-->NowState[%d]: DW_MCI_DATA_ERROR_FLAGS, datastatus=0x%x [%s]",\
if (status & DW_MCI_DATA_ERROR_FLAGS) {
if((SDMMC_CTYPE_1BIT != slot->ctype)&&(MMC_SEND_EXT_CSD == host->mrq->cmd->opcode))
MMC_DBG_ERR_FUNC("Pre-state[%d]-->NowState[%d]: DW_MCI_DATA_ERROR_FLAGS,datastatus=0x%x [%s]",\
prev_state,state, status, mmc_hostname(host->mmc));
if (status & SDMMC_INT_DRTO) {
data->error = -ETIMEDOUT;

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@@ -281,6 +281,7 @@ struct dw_mci_slot {
int wp_gpio;
int pwr_en_gpio;
u32 ctype;
u32 pre_ctype;
struct mmc_request *mrq;
struct list_head queue_node;

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@@ -12,13 +12,12 @@
#include "rk_sdmmc_of.h"
u32 mmc_debug_level;
u32 mmc_debug_level= MMC_DBG_ERROR;//MMC_DBG_ALL;//set the value refer to file rk_sdmmc_of.h
static void rockchip_mmc_of_dump(struct rk_sdmmc_of *rk_mmc_property)
{
mmc_debug_level = MMC_DBG_ERROR;//MMC_DBG_ALL;//set the value refer to file rk_sdmmc_of.h
MMC_DBG_BOOT_FUNC("=========rockchip mmc dts dump info start== 2014-03-12 14:23 ======");
{
MMC_DBG_BOOT_FUNC("=========rockchip mmc dts dump info start== 2014-03-14 15:51 ======");
/*
MMC_DBG_BOOT_FUNC("mmc,caps: 0x%x",rk_mmc_property->mmc_caps);
MMC_DBG_BOOT_FUNC("mmc,ocr: 0x%x",rk_mmc_property->mmc_ocr);