From 6181b2bd44251e7e94e0e121e42a2bb406bcf174 Mon Sep 17 00:00:00 2001 From: Bin Yang Date: Sat, 24 Feb 2018 11:35:34 +0800 Subject: [PATCH] ARM: dts: add rk3229 3nod full function board In the 3nod full function board, there are some pins is multiplexed (such as: PWM0/2, SDMMC, IR and SPDIF). So we need create two DT files rk3229-at-3nod.dts and rk3229-at-3nod-func.dts. In the rk3229-at-3nod, these pins be iomux to gpio. In the rk3229-at-3nod-func, these pins be iomux to function pins. Change-Id: I369dabc4dceb25023ab97b74e12cfef058e522d1 Signed-off-by: Bin Yang --- .../devicetree/bindings/arm/rockchip.txt | 8 + arch/arm/boot/dts/Makefile | 2 + arch/arm/boot/dts/rk3229-at-3nod-func.dts | 210 ++++++++++++++++++ arch/arm/boot/dts/rk3229-at-3nod.dts | 132 +++++++++++ 4 files changed, 352 insertions(+) create mode 100644 arch/arm/boot/dts/rk3229-at-3nod-func.dts create mode 100644 arch/arm/boot/dts/rk3229-at-3nod.dts diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt index a53100998463..d34e8fe9fca8 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.txt +++ b/Documentation/devicetree/bindings/arm/rockchip.txt @@ -130,3 +130,11 @@ Rockchip platforms device tree bindings - Rockchip PX30 evb ddr4 board: Required root node properties: - compatible = "rockchip,px30-evb-ddr4-v10", "rockchip,px30"; + +- Rockchip android things full function board: + Required root node properties: + - compatible = "rockchip,rk3229-at-3nod", "rockchip,rk3229"; + +- Rockchip android things full function board: + Required root node properties: + - compatible = "rockchip,rk3229-at-3nod-func", "rockchip,rk3229"; diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 42f854d05c84..e28d9b4129f2 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -523,6 +523,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3128-fireprime.dtb \ rk3188-radxarock.dtb \ rk3228-evb.dtb \ + rk3229-at-3nod.dtb \ + rk3229-at-3nod-func.dtb \ rk3229-at-gva.dtb \ rk3229-echo-v10.dtb \ rk3229-evb.dtb \ diff --git a/arch/arm/boot/dts/rk3229-at-3nod-func.dts b/arch/arm/boot/dts/rk3229-at-3nod-func.dts new file mode 100644 index 000000000000..5216ac573f50 --- /dev/null +++ b/arch/arm/boot/dts/rk3229-at-3nod-func.dts @@ -0,0 +1,210 @@ +/* + * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT). + */ + +/dts-v1/; + +#include "rk3229-at-som.dtsi" +#include + +/ { + model = "RK3229 ANDROID THINGS Full Function Board"; + compatible = "rockchip,rk3229-at-3nod-func", "rockchip,rk3229"; + + gpio_keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + autorepeat; + + pinctrl-names = "default"; + pinctrl-0 = <&pwr_key>; + + power_key { + label = "GPIO Key Power"; + gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>; + linux,code = <116>; + debounce-interval = <100>; + wakeup-source; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rk805 1>; + clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + + /* + * On the module itself this is one of these (depending + * on the actual card populated): + * - SDIO_RESET_L_WL_REG_ON + * - PDN (power down when low) + */ + reset-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>; /* GPIO3_B7 */ + }; + + vcc_sd: vcc-sd { + compatible = "regulator-fixed"; + gpio = <&gpio1 14 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc_sd_h>; + regulator-name = "vcc_sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + wireless-bluetooth { + compatible = "bluetooth-platdata"; + clocks = <&rk805 1>; + clock-names = "ext_clock"; + uart_rts_gpios = <&gpio3 6 GPIO_ACTIVE_LOW>; + pinctrl-names = "default", "rts_gpio"; + pinctrl-0 = <&uart11_rts>; + pinctrl-1 = <&uart11_rts_gpio>; + BT,reset_gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>; + BT,wake_gpio = <&gpio3 27 GPIO_ACTIVE_HIGH>; + BT,wake_host_irq = <&gpio3 26 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + wireless-wlan { + compatible = "wlan-platdata"; + rockchip,grf = <&grf>; + wifi_chip_type = "ap6255"; + WIFI,host_wake_irq = <&gpio0 28 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; +}; + +&emmc { + /* + * enable emmc ddr mode, choose the + * according parameter base on the emmc + * io voltage. + */ + mmc-ddr-1_8v; + status = "okay"; +}; + +&gpu { + status = "okay"; +}; + +&nandc { + status = "disabled"; +}; + +&pinctrl { + pinctrl-names = "default"; + pinctrl-0 = <&fixed_gpio>; + + keys { + pwr_key: pwr-key { + rockchip,pins = <3 23 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = <3 15 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + vcc-sd { + vcc_sd_h: vcc-sd-h { + rockchip,pins = <1 14 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + sdmmc { + sdmmc_cd: sdmmc-cd { + rockchip,pins = + <1 17 RK_FUNC_1 &pcfg_pull_none_drv_12ma>; + }; + }; +}; + +&pwm0 { + status = "okay"; +}; + +&pwm2 { + status = "okay"; +}; + +&pwm3 { + status = "okay"; + interrupts = ; + compatible = "rockchip,remotectl-pwm"; + remote_pwm_id = <3>; + handle_cpu_id = <1>; + remote_support_psci = <1>; + + ir_key1 { + rockchip,usercode = <0x4040>; + rockchip,key_table = + <0xf2 KEY_REPLY>, + <0xba KEY_BACK>, + <0xf4 KEY_UP>, + <0xf1 KEY_DOWN>, + <0xef KEY_LEFT>, + <0xee KEY_RIGHT>, + <0xbd KEY_HOME>, + <0xea KEY_VOLUMEUP>, + <0xe3 KEY_VOLUMEDOWN>, + <0xe2 KEY_SEARCH>, + <0xb2 KEY_POWER>, + <0xbc KEY_MUTE>, + <0xec KEY_MENU>, + <0xbf 0x190>, + <0xe0 0x191>, + <0xe1 0x192>, + <0xe9 183>, + <0xe6 248>, + <0xe8 185>, + <0xe7 186>, + <0xf0 388>, + <0xbe 0x175>; + }; +}; + +&reboot_mode { + /delete-property/ mode-bootloader; +}; + +&sdio { + max-frequency = <150000000>; + mmc-pwrseq = <&sdio_pwrseq>; + num-slots = <1>; + sd-uhs-sdr104; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + card-detect-delay = <200>; + disable-wp; + max-frequency = <50000000>; + num-slots = <1>; + supports-sd; + vmmc-supply = <&vcc_sd>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4 &sdmmc_cd>; + status = "okay"; +}; + +&vop { + assigned-clocks = <&cru DCLK_VOP>; + assigned-clock-parents = <&cru HDMIPHY>; + status = "okay"; +}; + +&vop_mmu { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/rk3229-at-3nod.dts b/arch/arm/boot/dts/rk3229-at-3nod.dts new file mode 100644 index 000000000000..cb24ccc6585c --- /dev/null +++ b/arch/arm/boot/dts/rk3229-at-3nod.dts @@ -0,0 +1,132 @@ +/* + * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT). + */ + +/dts-v1/; + +#include "rk3229-at-som.dtsi" + +/ { + model = "RK3229 ANDROID THINGS Full Function Board"; + compatible = "rockchip,rk3229-at-3nod", "rockchip,rk3229"; + + gpio_keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + autorepeat; + + pinctrl-names = "default"; + pinctrl-0 = <&pwr_key>; + + power_key { + label = "GPIO Key Power"; + gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>; + linux,code = <116>; + debounce-interval = <100>; + wakeup-source; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rk805 1>; + clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + + /* + * On the module itself this is one of these (depending + * on the actual card populated): + * - SDIO_RESET_L_WL_REG_ON + * - PDN (power down when low) + */ + reset-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>; /* GPIO3_B7 */ + }; + + wireless-bluetooth { + compatible = "bluetooth-platdata"; + clocks = <&rk805 1>; + clock-names = "ext_clock"; + uart_rts_gpios = <&gpio3 6 GPIO_ACTIVE_LOW>; + pinctrl-names = "default", "rts_gpio"; + pinctrl-0 = <&uart11_rts>; + pinctrl-1 = <&uart11_rts_gpio>; + BT,reset_gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>; + BT,wake_gpio = <&gpio3 27 GPIO_ACTIVE_HIGH>; + BT,wake_host_irq = <&gpio3 26 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + wireless-wlan { + compatible = "wlan-platdata"; + rockchip,grf = <&grf>; + wifi_chip_type = "ap6255"; + WIFI,host_wake_irq = <&gpio0 28 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; +}; + +&emmc { + /* + * enable emmc ddr mode, choose the + * according parameter base on the emmc + * io voltage. + */ + mmc-ddr-1_8v; + status = "okay"; +}; + +&gpu { + status = "okay"; +}; + +&nandc { + status = "disabled"; +}; + +&pinctrl { + pinctrl-names = "default"; + /* + * sdmmc, pwm0, pwm2, ir, and spdif pins are defaultly set as gpio, + * if you want to enable it, please remove below besides fixed_gpio. + */ + pinctrl-0 = <&sdmmc_gpio &pwm0_gpio &pwm2_gpio + &ir_gpio &spdif_gpio &fixed_gpio>; + + keys { + pwr_key: pwr-key { + rockchip,pins = <3 23 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = <3 15 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&reboot_mode { + /delete-property/ mode-bootloader; +}; + +&sdio { + max-frequency = <150000000>; + mmc-pwrseq = <&sdio_pwrseq>; + num-slots = <1>; + sd-uhs-sdr104; + status = "okay"; +}; + +&vop { + assigned-clocks = <&cru DCLK_VOP>; + assigned-clock-parents = <&cru HDMIPHY>; + status = "okay"; +}; + +&vop_mmu { + status = "okay"; +};