From 61d69a619d0ca22ee93210037faccc9799b83fed Mon Sep 17 00:00:00 2001 From: Herman Chen Date: Wed, 29 Dec 2021 16:08:16 +0800 Subject: [PATCH] arm64: dts: rockchip: rk3588s: Fix jpege clock dependency Signed-off-by: Herman Chen Change-Id: I4586266e1ad40c47ff34f8207d2ad9055e821e10 --- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 9aed32a6bbd6..d0af214fe979 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -2170,10 +2170,10 @@ reg = <0x0 0xfdba0000 0x0 0x400>; interrupts = ; interrupt-names = "irq_jpege0"; - clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; + clocks = <&cru ACLK_JPEG_ENCODER0>, <&cru HCLK_JPEG_ENCODER0>; clock-names = "aclk_vcodec", "hclk_vcodec"; rockchip,normal-rates = <594000000>, <0>; - assigned-clocks = <&cru ACLK_VPU>; + assigned-clocks = <&cru ACLK_JPEG_ENCODER0>; assigned-clock-rates = <594000000>; resets = <&cru SRST_A_JPEG_ENCODER0>, <&cru SRST_H_JPEG_ENCODER0>; reset-names = "video_a", "video_h"; @@ -2202,10 +2202,10 @@ reg = <0x0 0xfdba4000 0x0 0x400>; interrupts = ; interrupt-names = "irq_jpege1"; - clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; + clocks = <&cru ACLK_JPEG_ENCODER1>, <&cru HCLK_JPEG_ENCODER1>; clock-names = "aclk_vcodec", "hclk_vcodec"; rockchip,normal-rates = <594000000>, <0>; - assigned-clocks = <&cru ACLK_VPU>; + assigned-clocks = <&cru ACLK_JPEG_ENCODER1>; assigned-clock-rates = <594000000>; resets = <&cru SRST_A_JPEG_ENCODER1>, <&cru SRST_H_JPEG_ENCODER1>; reset-names = "video_a", "video_h"; @@ -2234,10 +2234,10 @@ reg = <0x0 0xfdba8000 0x0 0x400>; interrupts = ; interrupt-names = "irq_jpege2"; - clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; + clocks = <&cru ACLK_JPEG_ENCODER2>, <&cru HCLK_JPEG_ENCODER2>; clock-names = "aclk_vcodec", "hclk_vcodec"; rockchip,normal-rates = <594000000>, <0>; - assigned-clocks = <&cru ACLK_VPU>; + assigned-clocks = <&cru ACLK_JPEG_ENCODER2>; assigned-clock-rates = <594000000>; resets = <&cru SRST_A_JPEG_ENCODER2>, <&cru SRST_H_JPEG_ENCODER2>; reset-names = "video_a", "video_h"; @@ -2266,10 +2266,10 @@ reg = <0x0 0xfdbac000 0x0 0x400>; interrupts = ; interrupt-names = "irq_jpege3"; - clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; + clocks = <&cru ACLK_JPEG_ENCODER3>, <&cru HCLK_JPEG_ENCODER3>; clock-names = "aclk_vcodec", "hclk_vcodec"; rockchip,normal-rates = <594000000>, <0>; - assigned-clocks = <&cru ACLK_VPU>; + assigned-clocks = <&cru ACLK_JPEG_ENCODER3>; assigned-clock-rates = <594000000>; resets = <&cru SRST_A_JPEG_ENCODER3>, <&cru SRST_H_JPEG_ENCODER3>; reset-names = "video_a", "video_h";