diff --git a/arch/arm/boot/dts/rk3506g-iotest-pwm-test.dtsi b/arch/arm/boot/dts/rk3506g-iotest-pwm-test.dtsi
index 0434275de148..18ec9d236b36 100644
--- a/arch/arm/boot/dts/rk3506g-iotest-pwm-test.dtsi
+++ b/arch/arm/boot/dts/rk3506g-iotest-pwm-test.dtsi
@@ -40,32 +40,52 @@
 	status = "okay";
 	pinctrl-names = "active";
 	pinctrl-0 = <&rm_io8_pwm0_ch0>;
+#ifdef WAVE_CLK_PWM_RC_TEST
+	clocks = <&cru CLK_RC_PWM0>, <&cru PCLK_PWM0>, <&cru CLK_OSC_PWM0>;
+	clock-names = "pwm", "pclk", "osc";
+#else
 	assigned-clocks = <&cru CLK_PWM0>;
 	assigned-clock-rates = <100000000>;
+#endif
 };
 
 &pwm0_4ch_1 {
 	status = "okay";
 	pinctrl-names = "active";
 	pinctrl-0 = <&rm_io9_pwm0_ch1>;
+#ifdef WAVE_CLK_PWM_RC_TEST
+	clocks = <&cru CLK_RC_PWM0>, <&cru PCLK_PWM0>, <&cru CLK_OSC_PWM0>;
+	clock-names = "pwm", "pclk", "osc";
+#else
 	assigned-clocks = <&cru CLK_PWM0>;
 	assigned-clock-rates = <100000000>;
+#endif
 };
 
 &pwm0_4ch_2 {
 	status = "okay";
 	pinctrl-names = "active";
 	pinctrl-0 = <&rm_io10_pwm0_ch2>;
+#ifdef WAVE_CLK_PWM_RC_TEST
+	clocks = <&cru CLK_RC_PWM0>, <&cru PCLK_PWM0>, <&cru CLK_OSC_PWM0>;
+	clock-names = "pwm", "pclk", "osc";
+#else
 	assigned-clocks = <&cru CLK_PWM0>;
 	assigned-clock-rates = <100000000>;
+#endif
 };
 
 &pwm0_4ch_3 {
 	status = "okay";
 	pinctrl-names = "active";
 	pinctrl-0 = <&rm_io11_pwm0_ch3>;
+#ifdef WAVE_CLK_PWM_RC_TEST
+	clocks = <&cru CLK_RC_PWM0>, <&cru PCLK_PWM0>, <&cru CLK_OSC_PWM0>;
+	clock-names = "pwm", "pclk", "osc";
+#else
 	assigned-clocks = <&cru CLK_PWM0>;
 	assigned-clock-rates = <100000000>;
+#endif
 };
 
 &pwm1_8ch_0 {