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rk3368 lcdc: 1.add YUV domain overlay config; 2.edp force rgb888 output; 3.add 1.8 IO domain selete;

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Signed-off-by: hjc <hjc@rock-chips.com>
This commit is contained in:
hjc
2014-12-16 09:44:58 +08:00
committed by Huang, Tao
parent b490bce9e0
commit 623d53b7e2
3 changed files with 41 additions and 3 deletions
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2
arch/arm64/boot/dts/rk3368.dtsi
View File

@@ -673,6 +673,8 @@
lcdc: lcdc@ff930000 {
compatible = "rockchip,rk3368-lcdc";
rockchip,grf = <&grf>;
rockchip,pmu = <&pmu_grf>;
rockchip,prop = <PRMRY>;
rockchip,pwr18 = <0>;
rockchip,iommu-enabled = <0>;

27
drivers/video/rockchip/lcdc/rk3368_lcdc.c
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@@ -379,7 +379,7 @@ static void lcdc_read_reg_defalut_cfg(struct lcdc_device *lcdc_dev)
/********do basic init*********/
static int rk3368_lcdc_pre_init(struct rk_lcdc_driver *dev_drv)
{
u32 mask, val;
u32 mask, val, v;
struct lcdc_device *lcdc_dev =
container_of(dev_drv, struct lcdc_device, driver);
if (lcdc_dev->pre_init)
@@ -401,6 +401,15 @@ static int rk3368_lcdc_pre_init(struct rk_lcdc_driver *dev_drv)
/*backup reg config at uboot */
lcdc_read_reg_defalut_cfg(lcdc_dev);
if (lcdc_dev->pwr18 == 1) {
v = 0x00200020; /*bit5: 1,1.8v;0,3.3v*/
lcdc_grf_writel(lcdc_dev->pmugrf_base,
PMUGRF_SOC_CON0_VOP, v);
} else {
v = 0x00200000; /*bit5: 1,1.8v;0,3.3v*/
lcdc_grf_writel(lcdc_dev->pmugrf_base,
PMUGRF_SOC_CON0_VOP, v);
}
lcdc_writel(lcdc_dev, CABC_GAUSS_LINE0_0, 0x15110903);
lcdc_writel(lcdc_dev, CABC_GAUSS_LINE0_1, 0x00030911);
lcdc_writel(lcdc_dev, CABC_GAUSS_LINE1_0, 0x1a150b04);
@@ -1575,6 +1584,8 @@ static void rk3368_lcdc_bcsh_path_sel(struct rk_lcdc_driver *dev_drv)
container_of(dev_drv, struct lcdc_device, driver);
u32 bcsh_ctrl;
lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_OVERLAY_MODE,
v_OVERLAY_MODE(dev_drv->overlay_mode));
if (dev_drv->overlay_mode == VOP_YUV_DOMAIN) {
if (dev_drv->output_color == COLOR_YCBCR) /* bypass */
lcdc_msk_reg(lcdc_dev, BCSH_CTRL,
@@ -1746,7 +1757,7 @@ static int rk3368_load_screen(struct rk_lcdc_driver *dev_drv, bool initscreen)
v_MIPI_DCLK_POL(screen->pin_dclk);
break;
case SCREEN_EDP:
/*face = OUT_RGB_AAA;*/ /*RGB AAA output */
face = OUT_P888; /*RGB 888 output */
mask = m_EDP_OUT_EN | m_RGB_OUT_EN;
val = v_EDP_OUT_EN(1) | v_RGB_OUT_EN(0);
@@ -4292,6 +4303,18 @@ static int rk3368_lcdc_probe(struct platform_device *pdev)
if (IS_ERR(lcdc_dev->regsbak))
return PTR_ERR(lcdc_dev->regsbak);
lcdc_dev->dsp_lut_addr_base = (lcdc_dev->regs + GAMMA_LUT_ADDR);
lcdc_dev->grf_base =
syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
if (IS_ERR(lcdc_dev->grf_base)) {
dev_err(&pdev->dev, "can't find lcdc grf property\n");
return PTR_ERR(lcdc_dev->grf_base);
}
lcdc_dev->pmugrf_base =
syscon_regmap_lookup_by_phandle(np, "rockchip,pmu");
if (IS_ERR(lcdc_dev->pmugrf_base)) {
dev_err(&pdev->dev, "can't find lcdc pmu grf property\n");
return PTR_ERR(lcdc_dev->pmugrf_base);
}
lcdc_dev->id = 0;
dev_set_name(lcdc_dev->dev, "lcdc%d", lcdc_dev->id);
dev_drv = &lcdc_dev->driver;

15
drivers/video/rockchip/lcdc/rk3368_lcdc.h
View File

@@ -4,6 +4,8 @@
#include<linux/rk_fb.h>
#include<linux/io.h>
#include<linux/clk.h>
#include<linux/mfd/syscon.h>
#include<linux/regmap.h>
#define VOP_INPUT_MAX_WIDTH 4096 /*3840 for LINCOLN*/
@@ -1635,7 +1637,7 @@
#define MCU_BYPASS_WPORT (0x2200)
#define MCU_BYPASS_RPORT (0x2300)
#define PMUGRF_SOC_CON0_VOP (0x0100)
enum lb_mode {
LB_YUV_3840X5 = 0x0,
@@ -1737,6 +1739,8 @@ struct lcdc_device {
void __iomem *regs;
void *regsbak; /*back up reg*/
u32 reg_phy_base; /* physical basic address of lcdc register*/
struct regmap *grf_base;
struct regmap *pmugrf_base;
u32 len; /* physical map length of lcdc register*/
/*one time only one process allowed to config the register*/
spinlock_t reg_lock;
@@ -1863,6 +1867,15 @@ static inline void lcdc_cfg_done(struct lcdc_device *lcdc_dev)
dsb(sy);
}
static inline int lcdc_grf_writel(struct regmap *base,
u32 offset, u32 val)
{
regmap_write(base, offset, val);
dsb(sy);
return 0;
}
#define CUBIC_PRECISE 0
#define CUBIC_SPLINE 1
#define CUBIC_CATROM 2