From 62d3dd22e5e9452201a38ab4e858e09ddc42215f Mon Sep 17 00:00:00 2001
From: Shawn Lin <shawn.lin@rock-chips.com>
Date: Thu, 24 Dec 2020 11:31:34 +0800
Subject: [PATCH] arm64: dts: rockchip: Correct PCIe node for
 rk3568-evb2-lp4x-v10

Change-Id: I5da9046a833c9dede1b7359761aecf6ff731b215
Fixes: 99e10612ffbe ("arm64: dts: rockchip: add rk3568-evb2-lp4x-v10 for rk3568 evb2")
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
---
 .../dts/rockchip/rk3568-evb2-lp4x-v10.dtsi    | 19 +++++++++++++++----
 1 file changed, 15 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3568-evb2-lp4x-v10.dtsi b/arch/arm64/boot/dts/rockchip/rk3568-evb2-lp4x-v10.dtsi
index 7b59dfc95c88..be48d7878c7a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-evb2-lp4x-v10.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3568-evb2-lp4x-v10.dtsi
@@ -32,6 +32,17 @@
 		vin-supply = <&vcc3v3_sys>;
 	};
 
+	pcie20_3v3: gpio-regulator {
+		compatible = "regulator-gpio";
+		regulator-name = "pcie20_3v3";
+		regulator-min-microvolt = <0100000>;
+		regulator-max-microvolt = <3300000>;
+		gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
+		gpios-states = <0x1>;
+		states = <0100000 0x0
+			  3300000 0x1>;
+	};
+
 	pcie30_avdd0v9: pcie30-avdd0v9 {
 		compatible = "regulator-fixed";
 		regulator-name = "pcie30_avdd0v9";
@@ -234,18 +245,18 @@
 
 &pcie2x1 {
 	reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
-	vpcie3v3-supply = <&pcie30_3v3>;
-	status = "status";
+	vpcie3v3-supply = <&pcie20_3v3>;
+	status = "disabled";
 };
 
 &pcie30phy {
-	status = "status";
+	status = "disabled";
 };
 
 &pcie3x2 {
 	reset-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
 	vpcie3v3-supply = <&pcie30_3v3>;
-	status = "status";
+	status = "disabled";
 };
 
 &pinctrl {