diff --git a/arch/arm/boot/dts/rk312x-android.dtsi b/arch/arm/boot/dts/rk312x-android.dtsi
index b9e4bbdcd80e..1cda2dc70a4a 100644
--- a/arch/arm/boot/dts/rk312x-android.dtsi
+++ b/arch/arm/boot/dts/rk312x-android.dtsi
@@ -40,11 +40,9 @@
  *     OTHER DEALINGS IN THE SOFTWARE.
  */
 
-#include <dt-bindings/soc/rockchip-system-status.h>
 #include <dt-bindings/display/mipi_dsi.h>
 #include <dt-bindings/display/drm_mipi_dsi.h>
 #include <dt-bindings/display/media-bus-format.h>
-#include "rk3128-dram-default-timing.dtsi"
 
 / {
 	chosen {
@@ -57,55 +55,6 @@
 		nvmem-cell-names = "id";
 	};
 
-	dfi: dfi {
-		compatible = "rockchip,rk3128-dfi";
-		rockchip,pmu = <&pmu>;
-		rockchip,grf = <&grf>;
-		status = "okay";
-	};
-
-	dmc: dmc {
-		compatible = "rockchip,rk3128-dmc";
-		devfreq-events = <&dfi>;
-		clocks = <&cru SCLK_DDRC>;
-		clock-names = "dmc_clk";
-		upthreshold = <55>;
-		downdifferential = <10>;
-		operating-points-v2 = <&dmc_opp_table>;
-		vop-dclk-mode = <0>;
-		min-cpu-freq = <600000>;
-		rockchip,ddr_timing = <&ddr_timing>;
-		system-status-freq = <
-			/*system status		freq(KHz)*/
-			SYS_STATUS_NORMAL	456000
-			SYS_STATUS_SUSPEND	200000
-		>;
-		auto-min-freq = <300000>;
-		auto-freq-en = <0>;
-		status = "okay";
-	};
-
-	dmc_opp_table: opp_table2 {
-		compatible = "operating-points-v2";
-
-		opp-200000000 {
-			opp-hz = /bits/ 64 <200000000>;
-			opp-microvolt = <950000>;
-		};
-		opp-300000000 {
-			opp-hz = /bits/ 64 <300000000>;
-			opp-microvolt = <950000>;
-		};
-		opp-396000000 {
-			opp-hz = /bits/ 64 <396000000>;
-			opp-microvolt = <1100000>;
-		};
-		opp-456000000 {
-			opp-hz = /bits/ 64 <456000000>;
-			opp-microvolt = <1200000>;
-		};
-	};
-
 	fiq-debugger {
 		compatible = "rockchip,fiq-debugger";
 		rockchip,serial-id = <2>;
@@ -149,6 +98,10 @@
 	};
 };
 
+&dfi {
+	status = "okay";
+};
+
 &display_subsystem {
 	memory-region = <&cma_region>;
 	logo-memory-region = <&drm_logo>;
@@ -174,3 +127,7 @@
 		};
 	};
 };
+
+&dmc {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/rk312x.dtsi b/arch/arm/boot/dts/rk312x.dtsi
index faafbc0c6b44..677b535c1c4c 100644
--- a/arch/arm/boot/dts/rk312x.dtsi
+++ b/arch/arm/boot/dts/rk312x.dtsi
@@ -44,9 +44,11 @@
 #include <dt-bindings/pinctrl/rockchip.h>
 #include <dt-bindings/power/rk3128-power.h>
 #include <dt-bindings/soc/rockchip,boot-mode.h>
+#include <dt-bindings/soc/rockchip-system-status.h>
 #include <dt-bindings/clock/rk3128-cru.h>
 #include <dt-bindings/display/media-bus-format.h>
 #include <dt-bindings/thermal/thermal.h>
+#include "rk3128-dram-default-timing.dtsi"
 
 / {
 	interrupt-parent = <&gic>;
@@ -200,12 +202,61 @@
 		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
 	};
 
+	dfi: dfi {
+		compatible = "rockchip,rk3128-dfi";
+		rockchip,pmu = <&pmu>;
+		rockchip,grf = <&grf>;
+		status = "disabled";
+	};
+
 	display_subsystem: display-subsystem {
 		compatible = "rockchip,display-subsystem";
 		ports = <&vop_out>;
 		status = "disabled";
 	};
 
+	dmc: dmc {
+		compatible = "rockchip,rk3128-dmc";
+		devfreq-events = <&dfi>;
+		clocks = <&cru SCLK_DDRC>;
+		clock-names = "dmc_clk";
+		upthreshold = <55>;
+		downdifferential = <10>;
+		operating-points-v2 = <&dmc_opp_table>;
+		vop-dclk-mode = <0>;
+		min-cpu-freq = <600000>;
+		rockchip,ddr_timing = <&ddr_timing>;
+		system-status-freq = <
+			/*system status		freq(KHz)*/
+			SYS_STATUS_NORMAL	456000
+			SYS_STATUS_SUSPEND	200000
+		>;
+		auto-min-freq = <300000>;
+		auto-freq-en = <0>;
+		status = "disabled";
+	};
+
+	dmc_opp_table: opp_table2 {
+		compatible = "operating-points-v2";
+
+		opp-200000000 {
+			opp-hz = /bits/ 64 <200000000>;
+			opp-microvolt = <950000>;
+		};
+		opp-300000000 {
+			opp-hz = /bits/ 64 <300000000>;
+			opp-microvolt = <950000>;
+		};
+		opp-396000000 {
+			opp-hz = /bits/ 64 <396000000>;
+			opp-microvolt = <1100000>;
+		};
+		opp-456000000 {
+			opp-hz = /bits/ 64 <456000000>;
+			opp-microvolt = <1200000>;
+		};
+	};
+
 	psci {
 		compatible = "arm,psci-1.0";
 		method = "smc";