From 64d40c4000902b1237eb3744ec9a9678bb5299aa Mon Sep 17 00:00:00 2001 From: David Wu Date: Wed, 29 May 2019 10:57:50 +0800 Subject: [PATCH] pinctrl: rockchip: Add iomux recalculated for rk3328 GPIO2B0~GPIO2B6 The pins from GPIO2B0 to GPIO2B6 are located at GRF_GPIO2BL_IOMUX, they are recalculated to get correct iomux. Change-Id: I1e46697c4508c396b5e8140c32c4185925a040ea Signed-off-by: David Wu --- drivers/pinctrl/pinctrl-rockchip.c | 36 ++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c index ea01cd0371cd..a7c877db7fa3 100644 --- a/drivers/pinctrl/pinctrl-rockchip.c +++ b/drivers/pinctrl/pinctrl-rockchip.c @@ -829,11 +829,47 @@ static struct rockchip_mux_recalced_data rk3308b_mux_recalced_data[] = { static struct rockchip_mux_recalced_data rk3328_mux_recalced_data[] = { { + .num = 2, + .pin = 8, + .reg = 0x24, + .bit = 0, + .mask = 0x3 + }, { + .num = 2, + .pin = 9, + .reg = 0x24, + .bit = 2, + .mask = 0x3 + }, { + .num = 2, + .pin = 10, + .reg = 0x24, + .bit = 4, + .mask = 0x3 + }, { + .num = 2, + .pin = 11, + .reg = 0x24, + .bit = 6, + .mask = 0x3 + }, { .num = 2, .pin = 12, .reg = 0x24, .bit = 8, .mask = 0x3 + }, { + .num = 2, + .pin = 13, + .reg = 0x24, + .bit = 10, + .mask = 0x3 + }, { + .num = 2, + .pin = 14, + .reg = 0x24, + .bit = 12, + .mask = 0x3 }, { .num = 2, .pin = 15,