From 67020697e347dbc33cdd515e4d560e8712a0cd5d Mon Sep 17 00:00:00 2001 From: Swati Sharma Date: Fri, 18 Dec 2020 16:07:10 +0530 Subject: [PATCH] UPSTREAM: drm/edid: Parse MAX_FRL field from HFVSDB block This patch parses MAX_FRL field to get the MAX rate in Gbps that the HDMI 2.1 panel can support in FRL mode. Source need this field to determine the optimal rate between the source and sink during FRL training. v2: Fixed minor bugs, and removed extra wrapper function (Uma Shankar) Signed-off-by: Swati Sharma Signed-off-by: Ankit Nautiyal Reviewed-by: Uma Shankar [Jani: Fixed checkpatch FROM_SIGN_OFF_MISMATCH, PARENTHESIS_ALIGNMENT.] Signed-off-by: Jani Nikula Link: https://patchwork.freedesktop.org/patch/msgid/20201218103723.30844-3-ankit.k.nautiyal@intel.com (cherry picked from commit 4499d488f6eeb1f1d6a5c10c0c96361c02bb5145) Change-Id: I34cec87592960398eb04e9c2437b9352c14cdf3e --- drivers/gpu/drm/drm_edid.c | 44 +++++++++++++++++++++++++++++++++++++ include/drm/drm_connector.h | 6 +++++ 2 files changed, 50 insertions(+) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 88d13ac5ca61..34d40a0f821c 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -4277,6 +4277,41 @@ static void drm_parse_ycbcr420_deep_color_info(struct drm_connector *connector, hdmi->y420_dc_modes = dc_mask; } +static +void drm_get_max_frl_rate(int max_frl_rate, u8 *max_lanes, u8 *max_rate_per_lane) +{ + switch (max_frl_rate) { + case 1: + *max_lanes = 3; + *max_rate_per_lane = 3; + break; + case 2: + *max_lanes = 3; + *max_rate_per_lane = 6; + break; + case 3: + *max_lanes = 4; + *max_rate_per_lane = 6; + break; + case 4: + *max_lanes = 4; + *max_rate_per_lane = 8; + break; + case 5: + *max_lanes = 4; + *max_rate_per_lane = 10; + break; + case 6: + *max_lanes = 4; + *max_rate_per_lane = 12; + break; + case 0: + default: + *max_lanes = 0; + *max_rate_per_lane = 0; + } +} + static void drm_parse_hdmi_forum_vsdb(struct drm_connector *connector, const u8 *hf_vsdb) { @@ -4320,6 +4355,15 @@ static void drm_parse_hdmi_forum_vsdb(struct drm_connector *connector, } } + if (hf_vsdb[7]) { + u8 max_frl_rate; + + DRM_DEBUG_KMS("hdmi_21 sink detected. parsing edid\n"); + max_frl_rate = (hf_vsdb[7] & DRM_EDID_MAX_FRL_RATE_MASK) >> 4; + drm_get_max_frl_rate(max_frl_rate, &hdmi->max_lanes, + &hdmi->max_frl_rate_per_lane); + } + drm_parse_ycbcr420_deep_color_info(connector, hf_vsdb); parse_hdmi_hf_vsdb(connector, hf_vsdb); } diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h index 9b2dbd8dabf7..3413eb970746 100644 --- a/include/drm/drm_connector.h +++ b/include/drm/drm_connector.h @@ -209,6 +209,12 @@ struct drm_hdmi_info { /* @colorimetry: bitmap of supported colorimetry modes */ u16 colorimetry; + + /** @max_frl_rate_per_lane: support fixed rate link */ + u8 max_frl_rate_per_lane; + + /** @max_lanes: supported by sink */ + u8 max_lanes; }; /**