diff --git a/drivers/clk/rockchip/clk-rk3588.c b/drivers/clk/rockchip/clk-rk3588.c index ee2826a70742..a7b25c1d309b 100644 --- a/drivers/clk/rockchip/clk-rk3588.c +++ b/drivers/clk/rockchip/clk-rk3588.c @@ -1890,7 +1890,7 @@ static struct rockchip_clk_branch rk3588_clk_branches[] __initdata = { COMPOSITE(ACLK_VOP_ROOT, "aclk_vop_root", gpll_cpll_dmyaupll_npll_spll_p, 0, RK3588_CLKSEL_CON(110), 5, 3, MFLAGS, 0, 5, DFLAGS, RK3588_CLKGATE_CON(52), 0, GFLAGS), - FACTOR(0, "aclk_vop_div2_src", "aclk_vop_root", 0, 1, 2), + FACTOR(ACLK_VOP_DIV2_SRC, "aclk_vop_div2_src", "aclk_vop_root", 0, 1, 2), COMPOSITE_NODIV(ACLK_VOP_LOW_ROOT, "aclk_vop_low_root", mux_400m_200m_100m_24m_p, 0, RK3588_CLKSEL_CON(110), 8, 2, MFLAGS, RK3588_CLKGATE_CON(52), 1, GFLAGS), @@ -1906,8 +1906,9 @@ static struct rockchip_clk_branch rk3588_clk_branches[] __initdata = { COMPOSITE_NODIV(HCLK_VO1USB_TOP_ROOT, "hclk_vo1usb_top_root", mux_200m_100m_50m_24m_p, CLK_IS_CRITICAL, RK3588_CLKSEL_CON(170), 6, 2, MFLAGS, RK3588_CLKGATE_CON(74), 2, GFLAGS), - MUX(ACLK_VOP_SUB_SRC, "aclk_vop_sub_src", aclk_vop_sub_src_p, 0, - RK3588_CLKSEL_CON(115), 9, 1, MFLAGS), + COMPOSITE_NODIV(ACLK_VOP, "aclk_vop", aclk_vop_sub_src_p, CLK_SET_RATE_PARENT, + RK3588_CLKSEL_CON(115), 9, 1, MFLAGS, + RK3588_CLKGATE_CON(52), 9, GFLAGS), GATE(PCLK_EDP0, "pclk_edp0", "pclk_vo1_root", 0, RK3588_CLKGATE_CON(62), 0, GFLAGS), GATE(CLK_EDP0_24M, "clk_edp0_24m", "xin24m", 0, @@ -2064,8 +2065,6 @@ static struct rockchip_clk_branch rk3588_clk_branches[] __initdata = { RK3588_CLKGATE_CON(72), 4, GFLAGS), GATE(HCLK_VOP, "hclk_vop", "hclk_vop_root", 0, RK3588_CLKGATE_CON(52), 8, GFLAGS), - GATE(ACLK_VOP, "aclk_vop", "aclk_vop_sub_src", 0, - RK3588_CLKGATE_CON(52), 9, GFLAGS), COMPOSITE(DCLK_VOP0_SRC, "dclk_vop0_src", gpll_cpll_v0pll_aupll_p, 0, RK3588_CLKSEL_CON(111), 7, 2, MFLAGS, 0, 7, DFLAGS, RK3588_CLKGATE_CON(52), 10, GFLAGS), diff --git a/include/dt-bindings/clock/rk3588-cru.h b/include/dt-bindings/clock/rk3588-cru.h index 09a6a54ae084..33b0f08c8370 100644 --- a/include/dt-bindings/clock/rk3588-cru.h +++ b/include/dt-bindings/clock/rk3588-cru.h @@ -631,7 +631,7 @@ #define CLK_DSIHOST1 635 #define CLK_VOP_PMU 636 #define ACLK_VOP_DOBY 637 -#define ACLK_VOP_SUB_SRC 638 +#define ACLK_VOP_DIV2_SRC 638 #define CLK_USBDP_PHY0_IMMORTAL 639 #define CLK_USBDP_PHY1_IMMORTAL 640 #define CLK_PMU0 641