From 6849c1e28b7b59d0dd0e0d89ceed3a9e0968c6ff Mon Sep 17 00:00:00 2001 From: Ding Wei Date: Tue, 19 Dec 2023 15:56:54 +0800 Subject: [PATCH] video: rockchip: mpp: px30: fix issue combo_init when device probe In px30, rkvdec and vdpu&vepu need set grf and ensure working in current hardware mode before running. this issue may accur when get iommu dte_addr, thus add set_grf before, then ensure the hardware working mode. refer log when probe: [ 3.040107][ T53] mpp_rkvdec ff440000.hevc: Adding to iommu group 1 [ 3.040455][ T53] mpp_rkvdec ff440000.hevc: probing start [ 3.040939][ T53] rkvdec_init:1139: failed on clk_get clk_cabac [ 3.040991][ T53] rkvdec_init:1142: failed on clk_get clk_hevc_cabac [ 3.041031][ T53] mpp_rkvdec ff440000.hevc: reset_group->rw_sem_on=0 [ 3.041057][ T53] mpp_rkvdec ff440000.hevc: reset_group->rw_sem_on=0 [ 3.041107][ T53] mpp_rkvdec ff440000.hevc: shared_video_cabac is not found! [ 3.041123][ T53] rkvdec_init:1170: No cabac reset resource define [ 3.041141][ T53] mpp_rkvdec ff440000.hevc: shared_video_hevc_cabac is not found! [ 3.041156][ T53] rkvdec_init:1173: No hevc cabac reset resource define [ 3.042264][ T53] rk_iommu ff440440.iommu: Error during raw reset. MMU_DTE_ADDR is not functioning [ 3.042303][ T53] mpp_rkvdec ff440000.hevc: px30_workaround_combo_init dte_addr 00000000 [ 3.043372][ T53] rk_iommu ff440440.iommu: Error during raw reset. MMU_DTE_ADDR is not functioning [ 3.044133][ T53] mpp_rkvdec ff440000.hevc: probing finish Change-Id: I09a700e946871ef9822d44a868ff82ce085ed514 Signed-off-by: Ding Wei --- drivers/video/rockchip/mpp/hack/mpp_hack_px30.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/video/rockchip/mpp/hack/mpp_hack_px30.c b/drivers/video/rockchip/mpp/hack/mpp_hack_px30.c index 07912bcc3436..a8e1a457bf97 100644 --- a/drivers/video/rockchip/mpp/hack/mpp_hack_px30.c +++ b/drivers/video/rockchip/mpp/hack/mpp_hack_px30.c @@ -176,6 +176,10 @@ int px30_workaround_combo_init(struct mpp_dev *mpp) iommu->mmu_num++; } iommu->grf_val = mpp->grf_info->val & MPP_GRF_VAL_MASK; + /* + * switch grf ctrl bit to ensure working in current hardware + */ + mpp_set_grf(mpp->grf_info); if (mpp->hw_ops->clk_on) mpp->hw_ops->clk_on(mpp); /*