From 684fcdf11317ae71530aebfd8d998764f1bfbc6a Mon Sep 17 00:00:00 2001
From: Zefa Chen <zefa.chen@rock-chips.com>
Date: Fri, 11 Aug 2023 11:13:50 +0800
Subject: [PATCH] media: i2c: sc530ai change mipi data rate to 936Mbps/lane and
 vblank up to 6ms

Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: If172f3b0036efb1ab437d04f05d80360c464a8ad
---
 drivers/media/i2c/sc530ai.c | 59 ++++++++++++++++++++++---------------
 1 file changed, 35 insertions(+), 24 deletions(-)

diff --git a/drivers/media/i2c/sc530ai.c b/drivers/media/i2c/sc530ai.c
index 93ad74dad3ac..7738dc5b2ef9 100644
--- a/drivers/media/i2c/sc530ai.c
+++ b/drivers/media/i2c/sc530ai.c
@@ -52,6 +52,7 @@
 #define SC530AI_LINK_FREQ_396M		198000000 // 396Mbps
 #define SC530AI_LINK_FREQ_792M		396000000 // 792Mbps
 #define SC530AI_LINK_FREQ_792M_2LANE	396000000 // 792Mbps
+#define SC530AI_LINK_FREQ_936M_2LANE	468000000 // 936Mbps
 
 #define SC530AI_LINEAR_PIXEL_RATES	(SC530AI_LINK_FREQ_396M / 10 * 2 * 4)
 #define SC530AI_HDR_PIXEL_RATES		(SC530AI_LINK_FREQ_792M / 10 * 2 * 4)
@@ -520,18 +521,22 @@ static const struct regval sc530ai_10_30fps_2880x1620_2lane_regs[] = {
 	{0x37f9, 0x80},
 	{0x3018, 0x32},
 	{0x3019, 0x0c},
-	{0x301f, 0x18},
+	{0x301f, 0x42},
+	{0x320c, 0x06},
+	{0x320d, 0x27},
+	{0x320e, 0x07},
+	{0x320f, 0xbc},
 	{0x3250, 0x40},
 	{0x3251, 0x98},
 	{0x3253, 0x0c},
 	{0x325f, 0x20},
 	{0x3301, 0x08},
 	{0x3304, 0x50},
-	{0x3306, 0x78},
+	{0x3306, 0x88},
 	{0x3308, 0x14},
 	{0x3309, 0x70},
 	{0x330a, 0x00},
-	{0x330b, 0xd8},
+	{0x330b, 0xf8},
 	{0x330d, 0x10},
 	{0x331e, 0x41},
 	{0x331f, 0x61},
@@ -560,18 +565,18 @@ static const struct regval sc530ai_10_30fps_2880x1620_2lane_regs[] = {
 	{0x33ae, 0x30},
 	{0x33af, 0x50},
 	{0x33b1, 0x80},
-	{0x33b2, 0x80},
-	{0x33b3, 0x40},
+	{0x33b2, 0x48},
+	{0x33b3, 0x30},
 	{0x349f, 0x02},
 	{0x34a6, 0x48},
-	{0x34a7, 0x49},
-	{0x34a8, 0x40},
-	{0x34a9, 0x30},
-	{0x34f8, 0x4b},
-	{0x34f9, 0x30},
+	{0x34a7, 0x4b},
+	{0x34a8, 0x30},
+	{0x34a9, 0x18},
+	{0x34f8, 0x5f},
+	{0x34f9, 0x08},
 	{0x3632, 0x48},
 	{0x3633, 0x32},
-	{0x3637, 0x2b},
+	{0x3637, 0x29},
 	{0x3638, 0xc1},
 	{0x363b, 0x20},
 	{0x363d, 0x02},
@@ -582,7 +587,7 @@ static const struct regval sc530ai_10_30fps_2880x1620_2lane_regs[] = {
 	{0x367c, 0x40},
 	{0x367d, 0x48},
 	{0x3690, 0x32},
-	{0x3691, 0x32},
+	{0x3691, 0x43},
 	{0x3692, 0x33},
 	{0x3693, 0x40},
 	{0x3694, 0x4b},
@@ -594,7 +599,10 @@ static const struct regval sc530ai_10_30fps_2880x1620_2lane_regs[] = {
 	{0x36a3, 0x4b},
 	{0x36a4, 0x4f},
 	{0x36d0, 0x01},
+	{0x36ea, 0x0d},
+	{0x36eb, 0x04},
 	{0x36ec, 0x03},
+	{0x36ed, 0x14},
 	{0x370f, 0x01},
 	{0x3722, 0x00},
 	{0x3728, 0x10},
@@ -603,8 +611,10 @@ static const struct regval sc530ai_10_30fps_2880x1620_2lane_regs[] = {
 	{0x37b2, 0x83},
 	{0x37b3, 0x48},
 	{0x37b4, 0x49},
-	{0x37fb, 0x25},
+	{0x37fa, 0x0d},
+	{0x37fb, 0x24},
 	{0x37fc, 0x01},
+	{0x37fd, 0x14},
 	{0x3901, 0x00},
 	{0x3902, 0xc5},
 	{0x3904, 0x08},
@@ -614,19 +624,20 @@ static const struct regval sc530ai_10_30fps_2880x1620_2lane_regs[] = {
 	{0x391f, 0x44},
 	{0x3926, 0x21},
 	{0x3929, 0x18},
-	{0x3933, 0x81},
-	{0x3934, 0x81},
-	{0x3937, 0x69},
+	{0x3933, 0x82},
+	{0x3934, 0x0a},
+	{0x3937, 0x5f},
 	{0x3939, 0x00},
 	{0x393a, 0x00},
 	{0x39dc, 0x02},
-	{0x3e01, 0xcd},
-	{0x3e02, 0xa0},
+	{0x3e01, 0xf6},
+	{0x3e02, 0xe0},
 	{0x440e, 0x02},
 	{0x4509, 0x20},
-	{0x4800, 0x04},
-	{0x4837, 0x14},
+	{0x4837, 0x22},
 	{0x5010, 0x10},
+	{0x5780, 0x66},
+	{0x578d, 0x40},
 	{0x5799, 0x06},
 	{0x57ad, 0x00},
 	{0x5ae0, 0xfe},
@@ -658,8 +669,7 @@ static const struct regval sc530ai_10_30fps_2880x1620_2lane_regs[] = {
 	{0x5afe, 0x30},
 	{0x5aff, 0x28},
 	{0x36e9, 0x44},
-	{0x37f9, 0x34},
-//	{0x0100, 0x01},
+	{0x37f9, 0x44},
 	{REG_NULL, 0x00},
 };
 
@@ -713,10 +723,10 @@ static const struct sc530ai_mode supported_modes_2lane[] = {
 		},
 		.exp_def = 0xcda / 2,
 		.hts_def = 0xb40,
-		.vts_def = 0x0672,
+		.vts_def = 0x07bc,
 		.bus_fmt = MEDIA_BUS_FMT_SBGGR10_1X10,
 		.reg_list = sc530ai_10_30fps_2880x1620_2lane_regs,
-		.mipi_freq_idx = 2,
+		.mipi_freq_idx = 3,
 		.bpp = 10,
 		.hdr_mode = NO_HDR,
 		.vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_0,
@@ -727,6 +737,7 @@ static const s64 link_freq_items[] = {
 	SC530AI_LINK_FREQ_396M,
 	SC530AI_LINK_FREQ_792M,
 	SC530AI_LINK_FREQ_792M_2LANE,
+	SC530AI_LINK_FREQ_936M_2LANE,
 };
 
 /* Write registers up to 4 at a time */