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drm/rockchip: vop2: set correct primary plane for rk3566

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set esmart0 as port0 primary plane, smart0 as port1 primary
plane, esmart1 as port2 primary plane.

Change-Id: I0307426769be62c65ae37ab6917f01ba5f8500de
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
This commit is contained in:
Sandy Huang
2021-02-19 15:33:41 +08:00
parent 3088a3b56c
commit 68a6c87b27
1 changed files with 14 additions and 14 deletions
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28
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
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@@ -1084,15 +1084,15 @@ static const struct vop2_win_data rk3568_vop_win_data[] = {
},
{
.name = "Esmart1-win0",
.phys_id = 3,
.formats = formats_win_full_10bit,
.nformats = ARRAY_SIZE(formats_win_full_10bit),
.name = "Smart0-win0",
.phys_id = 4,
.base = 0x400,
.formats = formats_win_lite,
.nformats = ARRAY_SIZE(formats_win_lite),
.format_modifiers = format_modifiers,
.base = 0x200,
.layer_sel_id = 6,
.layer_sel_id = 3,
/* RK3568, RK3566 */
.possible_crtcs = { 0x7, 0x1 },
.possible_crtcs = { 0x7, 0x2 },
.supported_rotations = DRM_MODE_REFLECT_Y,
.hsu_filter_mode = VOP2_SCALE_UP_BIC,
.hsd_filter_mode = VOP2_SCALE_DOWN_BIL,
@@ -1108,15 +1108,15 @@ static const struct vop2_win_data rk3568_vop_win_data[] = {
},
{
.name = "Smart0-win0",
.phys_id = 4,
.base = 0x400,
.formats = formats_win_lite,
.nformats = ARRAY_SIZE(formats_win_lite),
.name = "Esmart1-win0",
.phys_id = 3,
.formats = formats_win_full_10bit,
.nformats = ARRAY_SIZE(formats_win_full_10bit),
.format_modifiers = format_modifiers,
.layer_sel_id = 3,
.base = 0x200,
.layer_sel_id = 6,
/* RK3568, RK3566 */
.possible_crtcs = { 0x7, 0x2 },
.possible_crtcs = { 0x7, 0x1 },
.supported_rotations = DRM_MODE_REFLECT_Y,
.hsu_filter_mode = VOP2_SCALE_UP_BIC,
.hsd_filter_mode = VOP2_SCALE_DOWN_BIL,