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ARM: dts: rockchip: rk3506-pinctrl: Increase driver strengths of some SPI IOs

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According to SPI signal test results:
(1) When using SPI IOs under 3.3V power domain, need to increase
    driver strength to level3.
(2) When using SPI IOs under 1.8V power domain, use default driver
    strength(level2) is best.

Change-Id: I0404418256d4f9671393345bf44ffd4e285af584
Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com>
This commit is contained in:
Xuhui Lin
2024-08-08 10:25:17 +08:00
parent 63cfe63d81
commit 68cf3d9c46
2 changed files with 249 additions and 249 deletions
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478
arch/arm/boot/dts/rk3506-pinctrl-rmio.dtsi
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File diff suppressed because it is too large Load Diff

20
arch/arm/boot/dts/rk3506-pinctrl.dtsi
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@@ -1106,24 +1106,24 @@
spi0_clk_pins: spi0-clk-pins {
rockchip,pins =
/* spi0_clk */
<0 RK_PC0 2 &pcfg_pull_none>,
<0 RK_PC0 2 &pcfg_pull_none_drv_level_3>,
/* spi0_miso */
<0 RK_PC2 2 &pcfg_pull_none>,
<0 RK_PC2 2 &pcfg_pull_none_drv_level_3>,
/* spi0_mosi */
<0 RK_PC1 2 &pcfg_pull_none>;
<0 RK_PC1 2 &pcfg_pull_none_drv_level_3>;
};
/omit-if-no-ref/
spi0_csn0_pins: spi0-csn0-pins {
rockchip,pins =
/* spi0_csn0 */
<0 RK_PC3 2 &pcfg_pull_none>;
<0 RK_PC3 2 &pcfg_pull_none_drv_level_3>;
};
/omit-if-no-ref/
spi0_csn1_pins: spi0-csn1-pins {
rockchip,pins =
/* spi0_csn1 */
<0 RK_PB7 2 &pcfg_pull_none>;
<0 RK_PB7 2 &pcfg_pull_none_drv_level_3>;
};
};
@@ -1132,24 +1132,24 @@
spi1_clk_pins: spi1-clk-pins {
rockchip,pins =
/* spi1_clk */
<0 RK_PB0 2 &pcfg_pull_none>,
<0 RK_PB0 2 &pcfg_pull_none_drv_level_3>,
/* spi1_miso */
<0 RK_PB2 2 &pcfg_pull_none>,
<0 RK_PB2 2 &pcfg_pull_none_drv_level_3>,
/* spi1_mosi */
<0 RK_PB1 2 &pcfg_pull_none>;
<0 RK_PB1 2 &pcfg_pull_none_drv_level_3>;
};
/omit-if-no-ref/
spi1_csn0_pins: spi1-csn0-pins {
rockchip,pins =
/* spi1_csn0 */
<0 RK_PB6 2 &pcfg_pull_none>;
<0 RK_PB6 2 &pcfg_pull_none_drv_level_3>;
};
/omit-if-no-ref/
spi1_csn1_pins: spi1-csn1-pins {
rockchip,pins =
/* spi1_csn1 */
<0 RK_PA7 2 &pcfg_pull_none>;
<0 RK_PA7 2 &pcfg_pull_none_drv_level_3>;
};
};