diff --git a/arch/arm64/boot/dts/rockchip/rk3562.dtsi b/arch/arm64/boot/dts/rockchip/rk3562.dtsi index 6908ef194196..deefbba2a5eb 100644 --- a/arch/arm64/boot/dts/rockchip/rk3562.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3562.dtsi @@ -899,26 +899,51 @@ reg = <0x0 0xfee03800 0x0 0x20>; }; + shaping_dam2ddr: shaping@fee03888 { + compatible = "syscon"; + reg = <0x0 0xfee03888 0x0 0x4>; + }; + qos_mcu: qos@fee10000 { compatible = "syscon"; reg = <0x0 0xfee10000 0x0 0x20>; }; + shaping_mcu: shaping@fee10088 { + compatible = "syscon"; + reg = <0x0 0xfee10088 0x0 0x4>; + }; + qos_dft_apb: qos@fee10100 { compatible = "syscon"; reg = <0x0 0xfee10100 0x0 0x20>; }; + shaping_dft_apb: shaping@fee10188 { + compatible = "syscon"; + reg = <0x0 0xfee10188 0x0 0x4>; + }; + qos_gmac: qos@fee10200 { compatible = "syscon"; reg = <0x0 0xfee10200 0x0 0x20>; }; + shaping_gmac: shaping@fee10288 { + compatible = "syscon"; + reg = <0x0 0xfee10288 0x0 0x4>; + }; + qos_mac100: qos@fee10300 { compatible = "syscon"; reg = <0x0 0xfee10300 0x0 0x20>; }; + shaping_mac100: shaping@fee10388 { + compatible = "syscon"; + reg = <0x0 0xfee10388 0x0 0x4>; + }; + qos_dcf: qos@fee10400 { compatible = "syscon"; reg = <0x0 0xfee10400 0x0 0x20>; @@ -929,117 +954,233 @@ reg = <0x0 0xfee20000 0x0 0x20>; }; + shaping_cpu: shaping@fee20088 { + compatible = "syscon"; + reg = <0x0 0xfee20088 0x0 0x4>; + }; + qos_daplite_apb: qos@fee20100 { compatible = "syscon"; reg = <0x0 0xfee20100 0x0 0x20>; }; + shaping_daplite_apb: shaping@fee20188 { + compatible = "syscon"; + reg = <0x0 0xfee20188 0x0 0x4>; + }; + qos_gpu: qos@fee30000 { compatible = "syscon"; reg = <0x0 0xfee30000 0x0 0x20>; priority-init = <0x202>; }; + shaping_gpu: shaping@fee30088 { + compatible = "syscon"; + reg = <0x0 0xfee30088 0x0 0x4>; + }; + qos_npu: qos@fee40000 { compatible = "syscon"; reg = <0x0 0xfee40000 0x0 0x20>; }; + shaping_npu: shaping@fee40088 { + compatible = "syscon"; + reg = <0x0 0xfee40088 0x0 0x4>; + }; + qos_rkvdec: qos@fee50000 { compatible = "syscon"; reg = <0x0 0xfee50000 0x0 0x20>; }; + shaping_rkvdec: shaping@fee50088 { + compatible = "syscon"; + reg = <0x0 0xfee50088 0x0 0x4>; + }; + qos_vepu: qos@fee60000 { compatible = "syscon"; reg = <0x0 0xfee60000 0x0 0x20>; }; + shaping_vepu: shaping@fee60088 { + compatible = "syscon"; + reg = <0x0 0xfee60088 0x0 0x4>; + }; + qos_isp: qos@fee70000 { compatible = "syscon"; reg = <0x0 0xfee70000 0x0 0x20>; }; + shaping_isp: shaping@fee70088 { + compatible = "syscon"; + reg = <0x0 0xfee70088 0x0 0x4>; + }; + qos_vicap: qos@fee70100 { compatible = "syscon"; reg = <0x0 0xfee70100 0x0 0x20>; }; + shaping_vicap: shaping@fee70188 { + compatible = "syscon"; + reg = <0x0 0xfee70188 0x0 0x4>; + }; + qos_vop: qos@fee80000 { compatible = "syscon"; reg = <0x0 0xfee80000 0x0 0x20>; }; + shaping_vop: shaping@fee80088 { + compatible = "syscon"; + reg = <0x0 0xfee80088 0x0 0x4>; + }; + qos_jpeg: qos@fee90000 { compatible = "syscon"; reg = <0x0 0xfee90000 0x0 0x20>; }; + shaping_jpeg: shaping@fee90088 { + compatible = "syscon"; + reg = <0x0 0xfee90088 0x0 0x4>; + }; + qos_rga_rd: qos@fee90100 { compatible = "syscon"; reg = <0x0 0xfee90100 0x0 0x20>; }; + shaping_rga_rd: shaping@fee90188 { + compatible = "syscon"; + reg = <0x0 0xfee90188 0x0 0x4>; + }; + qos_rga_wr: qos@fee90200 { compatible = "syscon"; reg = <0x0 0xfee90200 0x0 0x20>; }; + shaping_rga_wr: shaping@fee90288 { + compatible = "syscon"; + reg = <0x0 0xfee90288 0x0 0x4>; + }; + qos_pcie: qos@feea0000 { compatible = "syscon"; reg = <0x0 0xfeea0000 0x0 0x20>; }; + shaping_pcie: shaping@feea0088 { + compatible = "syscon"; + reg = <0x0 0xfeea0088 0x0 0x4>; + shaping-init = <0x5>; + }; + qos_usb3: qos@feea0100 { compatible = "syscon"; reg = <0x0 0xfeea0100 0x0 0x20>; }; + shaping_usb3: shaping@feea0188 { + compatible = "syscon"; + reg = <0x0 0xfeea0188 0x0 0x4>; + }; + qos_crypto_apb: qos@feeb0000 { compatible = "syscon"; reg = <0x0 0xfeeb0000 0x0 0x20>; }; + shaping_crypto_apb: shaping@feeb0088 { + compatible = "syscon"; + reg = <0x0 0xfeeb0088 0x0 0x4>; + }; + qos_crypto: qos@feeb0100 { compatible = "syscon"; reg = <0x0 0xfeeb0100 0x0 0x20>; }; + shaping_crypto: shaping@feeb0188 { + compatible = "syscon"; + reg = <0x0 0xfeeb0188 0x0 0x4>; + }; + qos_dmac: qos@feeb0200 { compatible = "syscon"; reg = <0x0 0xfeeb0200 0x0 0x20>; }; + shaping_dmac: shaping@feeb0288 { + compatible = "syscon"; + reg = <0x0 0xfeeb0288 0x0 0x4>; + }; + qos_emmc: qos@feeb0300 { compatible = "syscon"; reg = <0x0 0xfeeb0300 0x0 0x20>; }; + shaping_emmc: shaping@feeb0388 { + compatible = "syscon"; + reg = <0x0 0xfeeb0388 0x0 0x4>; + }; + qos_fspi: qos@feeb0400 { compatible = "syscon"; reg = <0x0 0xfeeb0400 0x0 0x20>; }; + shaping_fspi: shaping@feeb0488 { + compatible = "syscon"; + reg = <0x0 0xfeeb0488 0x0 0x4>; + }; + qos_rkdma: qos@feeb0500 { compatible = "syscon"; reg = <0x0 0xfeeb0500 0x0 0x20>; }; + shaping_rkdma: shaping@feeb0588 { + compatible = "syscon"; + reg = <0x0 0xfeeb0588 0x0 0x4>; + }; + qos_sdmmc0: qos@feeb0600 { compatible = "syscon"; reg = <0x0 0xfeeb0600 0x0 0x20>; }; + shaping_sdmmc0: shaping@feeb0688 { + compatible = "syscon"; + reg = <0x0 0xfeeb0688 0x0 0x4>; + }; + qos_sdmmc1: qos@feeb0700 { compatible = "syscon"; reg = <0x0 0xfeeb0700 0x0 0x20>; }; + shaping_sdmmc1: shaping@feeb0788 { + compatible = "syscon"; + reg = <0x0 0xfeeb0788 0x0 0x4>; + }; + qos_usb2: qos@feeb0800 { compatible = "syscon"; reg = <0x0 0xfeeb0800 0x0 0x20>; }; + shaping_usb2: shaping@feeb0888 { + compatible = "syscon"; + reg = <0x0 0xfeeb0888 0x0 0x4>; + }; + pmu_grf: syscon@ff010000 { compatible = "rockchip,rk3562-pmu-grf", "syscon", "simple-mfd"; reg = <0x0 0xff010000 0x0 0x10000>; @@ -1250,16 +1391,19 @@ pd_gpu@RK3562_PD_GPU { reg = ; pm_qos = <&qos_gpu>; + pm_shaping = <&shaping_gpu>; }; /* These power domains are grouped by VD_NPU */ pd_npu@RK3562_PD_NPU { reg = ; pm_qos = <&qos_npu>; + pm_shaping = <&shaping_npu>; }; /* These power domains are grouped by VD_LOGIC */ pd_vdpu@RK3562_PD_VDPU { reg = ; pm_qos = <&qos_rkvdec>; + pm_shaping = <&shaping_rkvdec>; }; pd_vi@RK3562_PD_VI { reg = ; @@ -1267,10 +1411,13 @@ #size-cells = <0>; pm_qos = <&qos_isp>, <&qos_vicap>; + pm_shaping = <&shaping_isp>, + <&shaping_vicap>; pd_vepu@RK3562_PD_VEPU { reg = ; pm_qos = <&qos_vepu>; + pm_shaping = <&shaping_vepu>; }; }; pd_vo@RK3562_PD_VO { @@ -1278,18 +1425,24 @@ #address-cells = <1>; #size-cells = <0>; pm_qos = <&qos_vop>; + pm_shaping= <&shaping_vop>; pd_rga@RK3562_PD_RGA { reg = ; pm_qos = <&qos_rga_rd>, <&qos_rga_wr>, <&qos_jpeg>; + pm_shaping = <&shaping_rga_rd>, + <&shaping_rga_wr>, + <&shaping_jpeg>; }; }; pd_php@RK3562_PD_PHP { reg = ; pm_qos = <&qos_pcie>, <&qos_usb3>; + pm_shaping = <&shaping_pcie>, + <&shaping_usb3>; }; }; };